ICS814252CKI-02LFT IDT, Integrated Device Technology Inc, ICS814252CKI-02LFT Datasheet - Page 11

• Manufacturer Part Number: ICS814252CKI-02LFT
• Description: IC VCXO/FEMTOCLK 2LVDS 32-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™, FemtoClock®r
• Type: Frequency Translator, Jitter Attenuator, Voltage Controlled Crystal Oscillator (VCXO)r

Specifications of ICS814252CKI-02LFT

• Pll: Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 312.5MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN
• Frequency-max: 312.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 814252CKI-02LFT

I
C
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating. Though
not required, but for additional protection, a 1kΩ resistor can be
tied from XTAL_IN to ground.
CLK/nCLK I
For applications not requiring the use of the differential input,
both CLK and nCLK can be left floating. Though not required, but
for additional protection, a 1kΩ resistor can be tied from CLK to
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
R
VFQFN EPAD T
In order to maximize both the removal of heat from the package
and the electrical perfor mance, a land patter n must be
incorporated on the Printed Circuit Board (PCB) within the footprint
of the package corresponding to the exposed metal pad or
exposed heat slug on the package, as shown in Figure 4. The
solderable area on the PCB, as defined by the solder mask, should
be at least the same size/shape as the exposed pad/slug area on
the package to maximize the thermal/electrical performance.
Sufficient clearance should be designed on the PCB between the
outer edges of the land pattern and the inner edges of pad pattern
for the leads to avoid any shorts.
While the land pattern on the PCB provides a means of heat
transfer and electrical grounding from the package to the board
through a solder joint, thermal vias are necessary to effectively
conduct from the surface of the PCB to the ground plane(s). The
land pattern must be connected to ground through these vias.
The vias act as “heat pipes”. The number of vias (i.e. “heat pipes”)
IDT
NPUTS
RYSTAL
ECOMMENDATIONS FOR
ICS814252I-02
VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER
™
/ ICS
:
I
NPUTS
™
VCXO JITTER ATTENUATOR/MULTIPLIER
ONTROL
NPUTS
F
IGURE
PIN PAD
P
INS
HERMAL
4. P.C.A
PIN
U
NUSED
SSEMBLY FOR
R
GROUND PLANE
SOLDER
ELEASE
I
NPUT AND
P
E
ATH
XPOSED
O
UTPUT
P
EXPOSED HEAT SLUG
AD
THERMAL VIA
T
HERMAL
P
INS
11
R
O
LVDS O
All unused LVDS output pairs can be either left floating or
terminated with 100Ω across. If they are left floating, we
recommend that there is no trace attached.
are application specific and dependent upon the package power
dissipation as well as electrical conductivity requirements. Thus,
thermal and electrical analysis and/or testing are recommended
to determine the minimum number needed. Maximum thermal
and electrical performance is achieved when an array of vias is
incorporated in the land pattern. It is recommended to use as
many vias connected to ground as possible. It is also
recommended that the via diameter should be 12 to 13mils (0.30
to 0.33mm) with 1oz copper via barrel plating. This is desirable to
avoid any solder wicking inside the via during the soldering process
which may result in voids in solder between the exposed pad/
slug and the thermal land. Precautions should be taken to
eliminate any solder voids between the exposed heat slug and
the land pattern. Note: These recommendations are to be used
as a guideline only. For further information, refer to the Application
Note on the Surface Mount Assembly of Amkor’s Thermally/
Electrically Enhance Leadfame Base Package, Amkor Technology.
ELEASE
UTPUTS
P
UTPUTS
ATH
:
LAND PATTERN
(GROUND PAD)
–S
IDE
SOLDER
V
IEW
ICS814252CKI-02 REV. A OCTOBER 5, 2007
(D
RAWING NOT TO
PIN
PIN PAD
S
CALE
PRELIMINARY
)