PCF8583P/F5,112 NXP Semiconductors, PCF8583P/F5,112 Datasheet - Page 11

IC CLK/CALENDAR 240X8 RAM 8-DIP

PCF8583P/F5,112

Manufacturer Part Number
PCF8583P/F5,112
Description
IC CLK/CALENDAR 240X8 RAM 8-DIP
Manufacturer
NXP Semiconductors
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of PCF8583P/F5,112

Package / Case
8-DIP (0.300", 7.62mm)
Memory Size
240B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD
Interface
I²C, 2-Wire Serial
Voltage - Supply
1 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1084-5
935261345112
PCF8583PN

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PCF8583P/F5,112
Manufacturer:
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Quantity:
147
Part Number:
PCF8583P/F5,112
Manufacturer:
NXP
Quantity:
1 688
NXP Semiconductors
PCF8583
Product data sheet
7.7 Timer
The timer (location 07h) is enabled by setting the control and status register to
XX0X X1XX. The timer counts up from 0 (or a programmed value) to 99. On overflow, the
timer resets to 0. The timer flag (LSB of control and status register) is set on overflow of
the timer. This flag must be reset by software. The inverted value of this flag can be
transferred to the external interrupt by setting bit 3 of the alarm control register.
Additionally, a timer alarm can be programmed by setting the timer alarm enable (bit 6 of
the alarm control register). When the value of the timer equals a pre-programmed value in
the alarm timer register (location 0Fh), the alarm flag is set (bit 1 of the control and status
register). The inverted value of the alarm flag can be transferred to the external interrupt
by enabling the alarm interrupt (bit 6 of the alarm control register).
Resolution of the timer is programmed via the 3 LSBs of the alarm control register (see
Figure
Fig 11. Selection of alarm weekdays
12).
MSB
013aaa375
7
6
All information provided in this document is subject to legal disclaimers.
5
Rev. 06 — 6 October 2010
4
3
2
1
LSB
0
Clock and calendar with 240 x 8-bit RAM
memory location 0Eh (alarm_weekday/month)
weekday 0 enabled when set
weekday 1 enabled when set
weekday 2 enabled when set
weekday 3 enabled when set
weekday 4 enabled when set
weekday 5 enabled when set
weekday 6 enabled when set
not used
PCF8583
© NXP B.V. 2010. All rights reserved.
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