PCF2129AT/1,518 NXP Semiconductors, PCF2129AT/1,518 Datasheet - Page 32

• Manufacturer Part Number: PCF2129AT/1,518
• Description: IC RTC /CALENDAR TCXO QTZ 20SOIC
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2129AT/1,518

• Package / Case: 20-SOIC (7.5mm Width)
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, SPI
• Voltage - Supply: 1.8 V ~ 4.2 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock/Calendar
• Supply Voltage (max): 4.2 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (3-Wire, I2C, SPI)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288599518

NXP Semiconductors
PCF2129A_2
Product data sheet
8.10.4 Pre-defined timers: second and minute interrupt
8.10.5 Clearing flags
PCF2129A has two pre-defined timers which are used to generate an interrupt either once
per second or once per minute. The pulse generator for the minute or second interrupt
operates from an internal 64 Hz clock. It is independent of the watchdog timer. Each of
these timers can be enabled by the bits SI (second interrupt) and MI (minute interrupt) in
register Control_1.
The flags MSF, AF, and TSFx can be cleared by using the interface. To prevent one flag
being overwritten while clearing another, a logic AND is performed during the write
access. A flag is cleared by writing logic 0 whilst a flag is not cleared by writing logic 1.
Writing logic 1 will result in the flag value remaining unchanged.
Two examples are given for clearing the flags. Clearing a flag is made by a write
command:
Repeatedly re-writing these bits has no influence on the functional behavior.
Table 33.
Register
Control_2
Fig 17. WD_CD set logic 1: watchdog activates an interrupt when timed out
•
•
•
•
•
timer value
When the watchdog timer counter reaches 1, the watchdog timer flag WDTF (register
Control_2) is set logic 1
When a minute or second interrupt occurs, the minute/second flag MSF (register
Control_2) is set logic 1 (see
Bits labeled with - must be written with their previous values
Bits labeled with T have to be written with logic 0
WDTF is read only and has to be written with logic 0
watchdog
WDTF
INT
Counter reached 1, WDTF is logic 1, and an interrupt is generated.
Flag location in register Control_2
All information provided in this document is subject to legal disclaimers.
Bit
7
MSF
Rev. 02 — 7 May 2010
n = 1
6
WDTF
Section
5
TSF2
8.12.1).
4
AF
Integrated RTC, TCXO and quartz crystal
3
T
2
-
PCF2129A
© NXP B.V. 2010. All rights reserved.
1
-
MCU
n
001aag062
0
T
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