PCF2129AT/2,518 NXP Semiconductors, PCF2129AT/2,518 Datasheet
PCF2129AT/2,518
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PCF2129AT/2,518 Summary of contents
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PCF2129AT Integrated RTC, TCXO and quartz crystal Rev. 5 — 12 February 2013 1. General description The PCF2129AT is a CMOS Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768 kHz quartz crystal optimized for very high accuracy and very ...
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... NXP Semiconductors 3. Applications Electronic metering for electricity, water, and gas Timekeeping instruments with high precision GPS equipment to reduce time to first fix Applications that require an accurate process timing Products with long automated unattended operation time 4. Ordering information Table 1 ...
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... NXP Semiconductors 6. Block diagram CLKOUT BBS V DD BATTERY BACK UP V SWITCH-OVER BAT CIRCUITRY V SS OSCILLATOR MONITOR INTERFACE SDA/CE SERIAL BUS SDO INTERFACE SDI SELECTOR SCL IFS INTERFACE TS Fig 1. Block diagram of PCF2129AT PCF2129AT Product data sheet TCXO OSCI 32.768 kHz OSCO TEMP ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. 7.2 Pin description Table 4. Symbol SCL SDI SDO SDA/CE IFS TS CLKOUT V SS n.c. INT BBS V BAT V DD PCF2129AT Product data sheet SCL 1 SDI 2 SDO 3 4 SDA/CE IFS CLKOUT n.c. 10 n.c. Top view. For mechanical details, see ...
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... NXP Semiconductors 8. Functional description The PCF2129AT is a Real Time Clock (RTC) and calendar with an on-chip Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768 kHz quartz crystal integrated into the same package. Address and data are transferred by a selectable 400 kHz Fast-mode I SPI-bus with separate data input and output (see SPI-bus is 6 ...
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... NXP Semiconductors • The register at address 0Fh defines the temperature measurement period and the clock out mode. The temperature measurement can be selected from every 4 minutes (default) down to every 30 seconds (see 32.768 kHz (default) down for use as a system clock, a microcontroller clock, and so on, can be chosen (see • ...
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... NXP Semiconductors Table 5. Register overview …continued Bit positions labeled as - are not implemented and will return 0 when read. Bits labeled as T must always be written with logic 0. Bits labeled as X are undefined at power-on and unchanged by subsequent resets. Address Register name Bit 7 0Dh Day_alarm ...
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... NXP Semiconductors 8.2 Control registers The first 3 registers of the PCF2129AT, with the addresses 00h, 01h, and 02h, are used as control registers. 8.2.1 Register Control_1 Table 6. Bit Symbol 7 EXT_TEST STOP 4 TSF1 3 POR_OVRD 2 12_24 [1] Default value. [2] When writing to the register this bit always has to be set logic 0. ...
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... NXP Semiconductors 8.2.2 Register Control_2 Table 7. Bit Symbol 7 MSF 6 WDTF 5 TSF2 TSIE 1 AIE 0 T [1] Default value. [2] When writing to the register this bit always has to be set logic 0. PCF2129AT Product data sheet Control_2 - control and status register 2 (address 01h) bit description ...
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... NXP Semiconductors 8.2.3 Register Control_3 Table 8. Bit Symbol PWRMNG[2:0] 4 BTSE BLF 1 BIE 0 BLIE [1] Values see [2] Default value. PCF2129AT Product data sheet Control_3 - control and status register 3 (address 02h) bit description Value Description [1] control of the battery switch-over, battery low detection, and extra power fail detection ...
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... NXP Semiconductors 8.3 Register CLKOUT_ctl Table 9. Bit Symbol TCR[1: COF[2:0] 8.3.1 Temperature compensated crystal oscillator The frequency of tuning fork quartz crystal oscillators is temperature-dependent. In the PCF2129AT, the frequency deviation caused by temperature variation is corrected by adjusting the load capacitance of the crystal oscillator. ...
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... NXP Semiconductors Table 11. COF[2:0] [2][3] 000 001 010 011 100 101 110 111 [1] Duty cycle definition: % HIGH-level time : % LOW-level time. [2] Default value. [3] The specified accuracy of the RTC can be only achieved with CLKOUT frequencies not equal to 32.768 kHz or if CLKOUT is disabled. PCF2129AT Product data sheet ...
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... NXP Semiconductors 8.4 Register Aging_offset Table 12. Bit Symbol AO[3:0] 8.4.1 Crystal aging correction The PCF2129AT has an offset register Aging_offset to correct the crystal aging effects The accuracy of the frequency of a quartz crystal depends on its aging. The aging offset adds an adjustment, positive or negative, in the temperature compensation circuit which allows correcting the aging effect ...
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... NXP Semiconductors 8.5 Power management functions The PCF2129AT has two power supply pins and one power output pin: • • V BAT • BBS - battery backed output voltage pin (equal to the internal power supply) The PCF2129AT has two power management functions implemented: • ...
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... NXP Semiconductors When a power failure condition occurs and the power supply switches to the battery, the following sequence occurs: 1. The battery switch flag BF (register Control_3) is set logic interrupt is generated if the control bit BIE (register Control_3) is enabled (see 3. If the control bit BTSE (register Control_3) is logic 1, the timestamp registers store the time and date when the battery switch occurred (see 4. The battery switch flag BF is cleared by command ...
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... NXP Semiconductors 8.5.1.2 Direct switching mode If V > < The direct switching mode is useful in systems where V This is not recommended if the V 3.0 V). In direct switching mode, the power consumption is reduced compared to V BAT the standard mode because the monitoring th(sw)bat (= 2 ...
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... NXP Semiconductors 8.5.1.4 Battery switch-over architecture The architecture of the battery switch-over circuit is shown in Fig 6. The internal power supply (available on pin BBS) is equal to V assured that there are decoupling capacitors on the pins V 8.5.2 Battery backup supply The V BBS on the selected battery switch-over function mode: Table 15 ...
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... NXP Semiconductors V BBS (mV) Fig 7. The output pin BBS can be used as a supply for external devices with battery backup needs, such as SRAM (see driving capability when V 8.5.3 Battery low detection function The PCF2129AT has a battery low detection circuit which monitors the status of the ...
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... NXP Semiconductors th(bat)low (= 2.5 V) Fig 8. PCF2129AT Product data sheet BBS BAT BLF INT Battery low detection behavior with bit BLIE set logic 1 (enabled) All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 PCF2129AT Integrated RTC, TCXO and quartz crystal ...
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... NXP Semiconductors 8.6 Oscillator stop detection function The PCF2129AT has an on-chip oscillator detection circuit which monitors the status of the oscillation: whenever the oscillation stops, a reset occurs and the oscillator stop flag OSF (in register Seconds) is set logic 1. • Power-on: a. The oscillator is not running, the chip is in reset (OSF is logic 1). ...
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... NXP Semiconductors 8.7 Reset function The PCF2129AT has a Power-On Reset (POR) and a Power-On Reset Override (PORO) function implemented. 8.7.1 Power-On Reset (POR) The POR is active whenever the oscillator is stopped. The oscillator is also considered to be stopped during the time between power-on and stable crystal resonance (see Figure 10) ...
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... NXP Semiconductors The setting of the PORO mode requires that POR_OVRD in register Control_1 is set logic 1 and that the signals at the interface pins SDA/CE and SCL are toggled as illustrated in Figure 12. All timings shown are required minimum. SDA/CE reset override Fig 12. Power-On Reset Override (PORO) sequence, valid for both I Once the override mode is entered, the device is immediately released from the reset state and the set-up operation can commence ...
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... NXP Semiconductors 8.8 Time and date function Most of these registers are coded in the Binary Coded Decimal (BCD) format. 8.8.1 Register Seconds Table 16. Bit Symbol 7 OSF SECONDS [1] Start-up value. Table 17. Seconds value in decimal 8.8.2 Register Minutes Table 18. Bit Symbol ...
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... NXP Semiconductors 8.8.3 Register Hours Table 19. Bit Symbol hour mode 5 AMPM 4 HOURS hour mode HOURS [1] Hour mode is set by the bit 12_24 in register Control_1. 8.8.4 Register Days Table 20. Bit Symbol DAYS [1] If the year counter contains a value which is exactly divisible by 4, including the year 00, the RTC compensates for leap years by adding ...
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... NXP Semiconductors 8.8.6 Register Months Table 23. Bit Symbol MONTHS Table 24. Month January February March April May June July August September October November December 8.8.7 Register Years Table 25. Bit Symbol YEARS 8.8.8 Setting and reading the time Figure 13 During read/write operations, the time counting circuits (memory locations 03h through 09h) are blocked ...
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... NXP Semiconductors Fig 13. Data flow of the time function After this read/write access is completed, the time circuit is released again. Any pending request to increment the time counters that occurred during the read/write access is serviced. A maximum of 1 request can be stored; therefore, all accesses must be completed within 1 second (see Fig 14 ...
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... NXP Semiconductors 8.9 Alarm function When one or more of the alarm bit fields are loaded with a valid second, minute, hour, day, or weekday and its corresponding alarm enable bit (AE_x) is logic 0, then that information is compared with the actual second, minute, hour, day, and weekday (see (1) Only when all enabled alarm settings are matching ...
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... NXP Semiconductors 8.9.2 Register Minute_alarm Table 27. Bit Symbol 7 AE_M MINUTE_ALARM [1] Default value. 8.9.3 Register Hour_alarm Table 28. Bit Symbol 7 AE_H hour mode 5 AMPM 4 HOUR_ALARM hour mode HOUR_ALARM [1] Default value. [2] Hour mode is set by the bit 12_24 in register Control_1. ...
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... NXP Semiconductors 8.9.5 Register Weekday_alarm Table 30. Bit Symbol 7 AE_W WEEKDAY_ALARM [1] Default value. 8.9.6 Alarm flag When all enabled comparisons first match, the alarm flag AF (register Control_2) is set. AF will remain set until cleared by command. Once AF has been cleared, it will only be set again when the time increments to match the alarm condition once more ...
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... NXP Semiconductors 8.10 Timer functions The PCF2129AT has a watchdog timer function. The timer can be switched on and off by using the control bit WD_CD in the register Watchdg_tim_ctl. The watchdog timer has four selectable source clocks. It can, for example, be used to detect a microcontroller with interrupt and reset capability which is out of control (see ...
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... NXP Semiconductors Table 33. TF[1:0] Timer source 8.10.3 Watchdog timer function The watchdog timer function is enabled or disabled by the WD_CD bit of the register Watchdg_tim_ctl (see The two bits TF[1:0] in register Watchdg_tim_ctl determine one of the four source clock frequencies for the watchdog timer: 4.096 kHz, 64 Hz, 1 Hz, or ...
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... NXP Semiconductors watchdog timer value WDTF Fig 17. WD_CD set logic 1: watchdog activates an interrupt when timed out • When the watchdog timer counter reaches 1, the watchdog timer flag WDTF (register Control_2) is set logic 1 • When a minute or second interrupt occurs, the minute/second flag MSF (register Control_2) is set logic 1 (see 8 ...
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... NXP Semiconductors Table 35. Register Control_2 The following tables show what instruction must be sent to clear the appropriate flag. Table 36. Register Control_2 [1] The bits labeled as - have to be rewritten with the previous values. Table 37. Register Control_2 [1] The bits labeled as - have to be rewritten with the previous values. ...
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... NXP Semiconductors 8.11 Timestamp function The PCF2129AT has an active LOW timestamp input pin TS, internally pulled with an on-chip pull-up resistor to the internal power supply of the device. It also has a timestamp detection circuit which can detect two different events: 1. Input on pin TS is driven to an intermediate level between power supply and ground. ...
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... NXP Semiconductors The TSF1 and TSF2 flags can be cleared by command; clearing both flags will clear the interrupt. Once TSF2 is cleared, it will only be set again when TS pin is driven to ground once again. 8.11.2 Timestamp mode The timestamp function has two different modes selected by the control bit TSM (timestamp mode) in register Timestp_ctl: • ...
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... NXP Semiconductors 8.11.3.4 Register Hour_timestp Table 41. Bit Symbol hour mode 5 AMPM 4 HOUR_TIMESTP hour mode HOUR_TIMESTP [1] Hour mode is set by the bit 12_24 in register Control_1. 8.11.3.5 Register Day_timestp Table 42. Bit Symbol DAY_TIMESTP 8.11.3.6 Register Mon_timestp Table 43 ...
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... NXP Semiconductors 8.11.4 Dependency between Battery switch-over and timestamp The timestamp function depends on the control bit BTSE in register Control_3: Table 45. BTSE [1] Default value. PCF2129AT Product data sheet Battery switch-over and timestamp Description [1] - the battery switch-over does not affect the timestamp registers ...
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... NXP Semiconductors 8.12 Interrupt output, INT PCF2129AT has an interrupt output pin INT which is open-drain, active LOW (requiring a pull-up resistor if used). Interrupts may be sourced from different places: • second or minute timer • watchdog timer • alarm • timestamp • battery switch-over • battery low detection ...
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... NXP Semiconductors The control bit TI_TP (register Watchdg_tim_ctl) is used to configure whether the interrupts generated from the second/minute timer (flag MSF in register Control_2) are pulsed signals or a permanently active signal. All the other interrupt sources generate a permanently active interrupt signal which follows the status of the corresponding flags. ...
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... NXP Semiconductors Fig 21. INT example for SI and MI when TI_TP is logic 0 The pulse generator for the minute/second interrupt operates from an internal 64 Hz clock and generates a pulse of 8.12.2 INT pulse shortening If the MSF flag (register Control_2) is cleared before the end of the INT pulse, then the INT pulse is shortened ...
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... NXP Semiconductors The interrupt is cleared when the flag WDTF is reset. WDTF is a read only bit and cannot be cleared by command. Instructions for clearing it can be found in 8.12.4 Alarm interrupts Generation of interrupts from the alarm function is controlled by the bit AIE (register Control_2). If AIE is enabled, the INT pin will follow the status of bit AF (register Control_2) ...
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... NXP Semiconductors 8.13 External clock test mode A test mode is available which allows on-board testing. In this mode possible to set up test conditions and control the operation of the RTC. The test mode is entered by setting bit EXT_TEST logic 1 (register Control_1). Then pin CLKOUT becomes an input. The test mode replaces the internal clock signal (64 Hz) with the signal applied to pin CLKOUT ...
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... NXP Semiconductors 8.14 STOP bit function The function of the STOP bit is to allow for accurate starting of the time circuits. STOP will cause the upper part of the prescaler (F are generated. The time circuits can then be set and will not increment until the STOP bit is released ...
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... NXP Semiconductors 32768 Hz F OSC Fig 24. STOP bit functional diagram Fig 25. STOP bit release timing PCF2129AT Product data sheet LOWER PRESCALER 128 Hz 16384 Hz 8192 Hz 4096 stop released All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 ...
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... NXP Semiconductors 9. Interfaces The PCF2129AT has done using the interface selection pin IFS (see Table 48. Pin IFS V DD SCL SDI SDO CE SCL 1 SDI 2 SDO 3 SDA/CE 4 IFS 5 PCF2129AT select the SPI-bus interface, pin IFS has to be connected to pin V ...
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... NXP Semiconductors 9.1 SPI-bus interface Data transfer to and from the device is made line SPI-bus (see lines for input and output are split. The data input and output line can be connected together to facilitate a bidirectional data bus (see whenever the chip enable line pin SDA/CE is inactive. ...
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... NXP Semiconductors Table 50. Bit R SCL SDI SDA/CE address xx counter In this example, the Seconds register is set to 45 seconds and the Minutes register to 10 minutes. Fig 29. SPI-bus write example R SCL SDI ...
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... NXP Semiconductors 2 9.2 I C-bus interface 2 The I C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines are connected to a positive supply by a pull-up resistor. Data transfer is initiated only when the bus is not busy ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER RECEIVER Fig 33. System configuration 9.2.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle. • A slave receiver which is addressed must generate an acknowledge after the reception of each byte. • ...
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... NXP Semiconductors Table 51. Bit The R/W bit defines the direction of the following single or multiple byte data transfer (read is logic 1, write is logic 0). For the format and the timing of the START condition (S), the STOP condition (P), and the acknowledge (A) refer to the I characteristics table either a STOP condition or the START condition of the next data transfer. ...
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... NXP Semiconductors 10. Internal circuitry Fig 37. Device diode protection diagram of PCF2129AT PCF2129AT Product data sheet SCL SDI SDO SDA/CE IFS TS CLKOUT V SS PCF2129AT All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 PCF2129AT Integrated RTC, TCXO and quartz crystal ...
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... NXP Semiconductors 11. Limiting values Table 52. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol BAT P tot V ESD stg T amb [1] Pass level; Human Body Model (HBM) according to [2] Pass level; Charged-Device Model (CDM), according to [3] Pass level ...
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... NXP Semiconductors 12. Static characteristics Table 53. Static characteristics Symbol Parameter Supplies V supply voltage DD V battery supply voltage BAT V calibration supply voltage DD(cal) V low voltage low I supply current DD I battery leakage current L(bat) Power management V battery switch threshold ...
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... NXP Semiconductors Table 53. Static characteristics Symbol Parameter [4] Inputs V input voltage I V LOW-level input voltage IL V HIGH-level input voltage IH I input leakage current LI C input capacitance i Outputs V output voltage O I LOW-level output current OL I HIGH-level output current ...
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... NXP Semiconductors 12.1 Current consumption characteristics, typical Fig 38. I (μA) Fig 39. I PCF2129AT Product data sheet (mA 1.5 Typical value 0 pin SDA/ 1.6 1.2 0.8 0.4 0 −40 −20 0 CLKOUT disabled; PWRMNG[2:0] = 111; TSOFF = 1; TS input floating function of temperature DD All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors (μA) a. PWRMNG[2:0] = 111; TSOFF = 1; T (μA) b. PWRMNG[2:0] = 000; TSOFF = 0; T Fig 40. I PCF2129AT Product data sheet 2 1.6 1.2 0.8 0.4 0 1.8 2.2 2.6 4 3.2 2.4 1.6 0.8 0 1.8 2.2 2 function All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 PCF2129AT Integrated RTC, TCXO and quartz crystal ...
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... NXP Semiconductors 12.2 Frequency characteristics Table 54. Frequency characteristics Symbol Parameter f output frequency o f/f frequency stability f /f relative crystal frequency variation crystal aging, first year; xtal xtal f/V frequency variation with voltage 1 ppm corresponds to a time deviation of 0.0864 seconds per day. ...
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... NXP Semiconductors 13. Dynamic characteristics 13.1 SPI-bus timing characteristics Table 55. SPI-bus characteristics operating supply voltage at ambient temperature and referenced to V Figure 42). Symbol Parameter Pin SCL f SCL clock frequency clk(SCL) t SCL time SCL t clock HIGH time clk(H) t clock LOW time ...
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... NXP Semiconductors CE t su(CE_N) SCL WRITE SDI R/W SA2 high-Z SDO READ SDI b7 high-Z SDO Fig 42. SPI-bus timing PCF2129AT Product data sheet t w(CE_N 80% 20% RA0 t(SDI-SDO) All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 ...
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... NXP Semiconductors 2 13.2 I C-bus timing characteristics Table 56. All timing characteristics are valid within the operating supply voltage and ambient temperature range and reference and 70 % with an input voltage swing of V Symbol Parameter Pin SCL f SCL t LOW t HIGH Pin SDA/CE t SU;DAT t HD;DAT ...
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... NXP Semiconductors START PROTOCOL CONDITION (S) t SU;STA SCL t BUF SDA t HD;STA 2 Fig 43. I C-bus timing diagram; rise and fall times refer and 70 % 14. Application information For information about application configuration, see PCF2129AT Product data sheet BIT 7 BIT 6 MSB (A6) (A7 LOW ...
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... NXP Semiconductors 15. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 16. Packing information 16.1 Carrier tape information Fig 45. Tape and reel details for PCF2129AT Table 57. Symbol Compartments Overall dimensions 17. Soldering For information about soldering, see PCF2129AT Product data sheet TOP VIEW direction of feed Original dimensions are in mm. ...
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... NXP Semiconductors 18. Footprint information solder lands occupied area Fig 46. Footprint information for reflow soldering of SO20 package PCF2129AT Product data sheet 13.40 0.60 (20×) 1.50 8.00 1.27 (18×) placement accuracy ± 0.25 Dimensions in mm All information provided in this document is subject to legal disclaimers. Rev. 5 — 12 February 2013 PCF2129AT Integrated RTC, TCXO and quartz crystal 11 ...
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... NXP Semiconductors 19. Abbreviations Table 58. Acronym AM BCD CDM CMOS DC GPS HBM LSB MCU MM MSB PM POR PORO PPM RC RTC SCL SDA SPI SRAM TCXO Xtal PCF2129AT Product data sheet Abbreviations Description Ante Meridiem Binary Coded Decimal Charged Device Model Complementary Metal-Oxide Semiconductor ...
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... NXP Semiconductors 20. References [1] AN10365 — Surface mount reflow soldering description [2] AN10853 — Handling precautions of ESD sensitive devices [3] AN10857 — Application and soldering information for PCF2127A and PCF2129A TCXO RTC [4] IEC 60134 — Rating systems for electronic tubes and valves and analogous ...
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... NXP Semiconductors 21. Revision history Table 59. Revision history Document ID Release date PCF2129AT v.5 20130212 • Modifications: Improved description of V PCF2129AT v.4 20121107 PCF2129AT v.3 20121004 PCF2129A v.2 20100507 PCF2129A v.1 20100113 PCF2129AT Product data sheet Data sheet status Product data sheet pin in Table 4 BAT Product data sheet ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 24. Tables Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Table 2. Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 4. Pin description of PCF2129AT . . . . . . . . . . . . . .4 Table 5. Register overview . . . . . . . . . . . . . . . . . . . . . . .6 Table 6. Control_1 - control and status register 1 (address 00h) bit description . . . . . . . . . . . . . . .8 Table 7. Control_2 - control and status register 2 (address 01h) bit description . . . . . . . . . . . . . . .9 Table 8. Control_3 - control and status register 3 (address 02h) bit description ...
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... NXP Semiconductors 25. Figures Fig 1. Block diagram of PCF2129AT . . . . . . . . . . . . . . . .3 Fig 2. Pin configuration for PCF2129AT (SO20 Fig 3. Handling address registers . . . . . . . . . . . . . . . . . .5 Fig 4. Battery switch-over behavior in standard mode with bit BIE set logic 1 (enabled .15 Fig 5. Battery switch-over behavior in direct switching mode with bit BIE set logic 1 (enabled .16 Fig 6 ...
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... NXP Semiconductors 26. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 Register overview . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Control registers . . . . . . . . . . . . . . . . . . . . . . . . 8 8.2.1 Register Control_1 . . . . . . . . . . . . . . . . . . . . . . 8 8.2.2 Register Control_2 . . . . . . . . . . . . . . . . . . . . . . 9 8.2.3 Register Control_3 . . . . . . . . . . . . . . . . . . . . . 10 8.3 Register CLKOUT_ctl . . . . . . . . . . . . . . . . . . . 11 8 ...
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... NXP Semiconductors 12.1 Current consumption characteristics, typical . 55 12.2 Frequency characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 58 13.1 SPI-bus timing characteristics . . . . . . . . . . . . 58 2 13.2 I C-bus timing characteristics . . . . . . . . . . . . . 60 14 Application information Package outline . . . . . . . . . . . . . . . . . . . . . . . . 62 16 Packing information . . . . . . . . . . . . . . . . . . . . 63 16.1 Carrier tape information . . . . . . . . . . . . . . . . . 63 17 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 18 Footprint information . . . . . . . . . . . . . . . . . . . 64 19 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 65 20 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 67 22 Legal information ...