PCF2129AT/2,518 NXP Semiconductors, PCF2129AT/2,518 Datasheet - Page 42

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PCF2129AT/2,518

Manufacturer Part Number
PCF2129AT/2,518
Description
Real Time Clock
Manufacturer
NXP Semiconductors
Series
PCF2129r
Datasheet

Specifications of PCF2129AT/2,518

Rohs
yes
Function
Clock, Calendar, Alarm, Watchdog, Timestamp
Rtc Bus Interface
I2C, SPI
Date Format
Binary
Time Format
Binary
Supply Voltage - Max
4.2 V
Supply Voltage - Min
1.2 V
Maximum Operating Temperature
+ 60 C
Minimum Operating Temperature
- 15 C
Mounting Style
SMD/SMT
Package / Case
SOP-20
Battery Backup Switching
Yes
Factory Pack Quantity
2000

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NXP Semiconductors
PCF2129AT
Product data sheet
8.13 External clock test mode
A test mode is available which allows on-board testing. In this mode, it is possible to set
up test conditions and control the operation of the RTC.
The test mode is entered by setting bit EXT_TEST logic 1 (register Control_1). Then
pin CLKOUT becomes an input. The test mode replaces the internal clock signal (64 Hz)
with the signal applied to pin CLKOUT. Every 64 positive edges applied to pin CLKOUT
generate an increment of one second.
The signal applied to pin CLKOUT should have a minimum pulse width of 300 ns and a
maximum period of 1000 ns. The internal clock, now sourced from CLKOUT, is divided
down by a 2
known state by using bit STOP. When bit STOP is logic 1, the prescaler is reset to 0.
STOP must be cleared before the prescaler can operate again.
From a stop condition, the first 1 second increment will take place after 32 positive edges
on pin CLKOUT. Thereafter, every 64 positive edges will cause a 1 second increment.
Remark: Entry into test mode is not synchronized to the internal 64 Hz clock. When
entering the test mode, no assumption as to the state of the prescaler can be made.
Operating example:
Repeat 7 and 8 for additional increments.
1. Set EXT_TEST test mode (register Control_1, EXT_TEST is logic 1).
2. Set bit STOP (register Control_1, STOP is logic 1).
3. Set time registers to desired value.
4. Clear STOP (register Control_1, STOP is logic 0).
5. Apply 32 clock pulses to CLKOUT.
6. Read time registers to see the first change.
7. Apply 64 clock pulses to CLKOUT.
8. Read time registers to see the second change.
6
divider chain called prescaler (see
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 12 February 2013
Integrated RTC, TCXO and quartz crystal
Table
47). The prescaler can be set into a
PCF2129AT
© NXP B.V. 2013. All rights reserved.
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