PCF2129AT/2,518 NXP Semiconductors, PCF2129AT/2,518 Datasheet - Page 21
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PCF2129AT/2,518
Manufacturer Part Number
PCF2129AT/2,518
Description
Real Time Clock
Manufacturer
NXP Semiconductors
Series
PCF2129r
Datasheet
1.PCF2129AT2518.pdf
(73 pages)
Specifications of PCF2129AT/2,518
Rohs
yes
Function
Clock, Calendar, Alarm, Watchdog, Timestamp
Rtc Bus Interface
I2C, SPI
Date Format
Binary
Time Format
Binary
Supply Voltage - Max
4.2 V
Supply Voltage - Min
1.2 V
Maximum Operating Temperature
+ 60 C
Minimum Operating Temperature
- 15 C
Mounting Style
SMD/SMT
Package / Case
SOP-20
Battery Backup Switching
Yes
Factory Pack Quantity
2000
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCF2129AT/2,518
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCF2129AT
Product data sheet
8.7.1 Power-On Reset (POR)
8.7.2 Power-On Reset Override (PORO)
8.7 Reset function
The PCF2129AT has a Power-On Reset (POR) and a Power-On Reset Override (PORO)
function implemented.
The POR is active whenever the oscillator is stopped. The oscillator is also considered to
be stopped during the time between power-on and stable crystal resonance (see
Figure
supply voltage. Whenever an internal reset occurs, the oscillator stop flag is set (OSF set
logic 1).
After POR, the following mode is entered:
The register values after power-on are shown in
The POR duration is directly related to the crystal oscillator start-up time. Due to the long
start-up times experienced by these types of circuits, a mechanism has been built in to
disable the POR and therefore speed up the on-board test of the device.
Fig 10. Dependency between POR and oscillator
Fig 11. Power-On Reset (POR) system
•
•
•
•
•
32.768 kHz CLKOUT active
Power-On Reset Override (PORO) available to be set
24 hour mode is selected
Battery switch-over is enabled
Battery low detection is enabled
10). This time may be in the range of 200 ms to 2 s depending on temperature and
oscillation
internal
reset
V
DD
All information provided in this document is subject to legal disclaimers.
SDA/CE
SCL
Rev. 5 — 12 February 2013
OSCILLATOR
POR_OVRD
OVERRIDE
RESET
CLEAR
chip in reset
0 = override inactive
1 = override active
0 = clear override mode
1 = override possible
0 = stopped, 1 = running
osc stopped
Integrated RTC, TCXO and quartz crystal
Table
5.
chip not in reset
001aaj324
PCF2129AT
reset
© NXP B.V. 2013. All rights reserved.
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