PCF2129AT/2,518 NXP Semiconductors, PCF2129AT/2,518 Datasheet - Page 40

• Manufacturer Part Number: PCF2129AT/2,518
• Description: Real Time Clock
• Manufacturer: NXP Semiconductors
• Series: PCF2129r

Specifications of PCF2129AT/2,518

• Rohs: yes
• Function: Clock, Calendar, Alarm, Watchdog, Timestamp
• Rtc Bus Interface: I2C, SPI
• Date Format: Binary
• Time Format: Binary
• Supply Voltage - Max: 4.2 V
• Supply Voltage - Min: 1.2 V
• Maximum Operating Temperature: + 60 C
• Minimum Operating Temperature: - 15 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-20
• Battery Backup Switching: Yes
• Factory Pack Quantity: 2000

NXP Semiconductors
PCF2129AT
Product data sheet
8.12.2 INT pulse shortening
8.12.3 Watchdog timer interrupts
The pulse generator for the minute/second interrupt operates from an internal 64 Hz clock
and generates a pulse of
If the MSF flag (register Control_2) is cleared before the end of the INT pulse, then the
INT pulse is shortened. This allows the source of a system interrupt to be cleared
immediately when it is serviced, that is, the system does not have to wait for the
completion of the pulse before continuing; see
MSF can be found in
The generation of interrupts from the watchdog timer is controlled using the WD_CD bit
(register Watchdg_tim_ctl). The interrupt is generated as an active signal which follows
the status of the watchdog timer flag WDTF (register Control_2). No pulse generation is
possible for watchdog timer interrupts.
Fig 21. INT example for SI and MI when TI_TP is logic 0
Fig 22. Example of shortening the INT pulse by clearing the MSF flag
(1) Indicates normal duration of INT pulse.
MSF when only MI enabled
INT when only MI enabled
In this example, bit TI_TP is logic 0 and the MSF flag is cleared after an interrupt.
The timing shown for clearing bit MSF is also valid for the non-pulsed interrupt mode, that is, when
TI_TP is logic 0, where the INT pulse may be shortened by setting both bits MI and SI logic 0.
MSF when SI enable
INT when SI enable
seconds counter
All information provided in this document is subject to legal disclaimers.
seconds counter
minutes counter
instruction
Section
Rev. 5 — 12 February 2013
MSF
SCL
INT
1
⁄
64
58
seconds in duration.
8.10.5.
58
59
59
CLEAR INSTRUCTION
Integrated RTC, TCXO and quartz crystal
Figure
59
11
00
12
22. Instructions for clearing the bit
8th clock
00
PCF2129AT
01
001aaf908
© NXP B.V. 2013. All rights reserved.
(1)
001aag072
40 of 73