M41T56M6E STMicroelectronics, M41T56M6E Datasheet - Page 9

• Manufacturer Part Number: M41T56M6E
• Description: IC SRAM SRL TIMEKPR 512BIT 8SOIC
• Manufacturer: STMicroelectronics
• Type: Clock/Calendar/NVSRAMr

Specifications of M41T56M6E

• Memory Size: 56B
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Function: Clock/Calendar
• Rtc Memory Size: 64 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (2-Wire, I2C)
• Nvram Features: RTC, Internal Battery, XTAL
• Interface Type: I2C, Serial, 2-Wire
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2818-5; M41T56M6

READ Mode
In this mode, the master reads the M41T56 slave
after setting the slave address (see Figure
Figure 11., page
Control Bit (R/W = 0) and the Acknowledge Bit, the
word address A
pointer. Next the START condition and slave ad-
dress are repeated, followed by the READ Mode
Control Bit (R/W = 1). At this point, the master
transmitter becomes the master receiver. The data
byte which was addressed will be transmitted and
the master receiver will send an Acknowledge Bit
to the slave transmitter. The address pointer is
only incremented on reception of an Acknowledge
Figure 10. Slave Address Location
Figure 11. READ Mode Sequence
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
n
9). Following the WRITE Mode
is written to the on-chip address
S
ADDRESS
SLAVE
START
DATA n+X
ADDRESS (n)
WORD
1
10
P
1
SLAVE ADDRESS
and
0
S
1
ADDRESS
Bit. The M41T56 slave transmitter will now place
the data byte at address A
master receiver reads and acknowledges the new
byte and the address pointer is incremented to A
+ 2. This cycle of reading consecutive addresses
will continue until the master receiver sends a
STOP condition to the slave transmitter.
An alternate READ Mode may also be implement-
ed, whereby the master reads the M41T56 slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer, see
0
SLAVE
0
0
R/W
A
DATA n
AI00602
Figure 12., page
DATA n+1
n
+ 1 on the bus. The
AI00899
M41T56
10.
9/24
n