LTC2440IGN#TRPBF Linear Technology, LTC2440IGN#TRPBF Datasheet - Page 11

• Manufacturer Part Number: LTC2440IGN#TRPBF
• Description: IC ADC DIFFER 24-BIT HS 16-SSOP
• Manufacturer: Linear Technology

Specifications of LTC2440IGN#TRPBF

• Number Of Bits: 24
• Sampling Rate (per Second): 3.5k
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 40mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP (0.150", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
0.5 • V
the converter indicates the overrange or the underrange
condition using distinct output codes.
Output Data Format
The LTC2440 serial output data stream is 32-bits long.
The fi rst 3-bits represent status information indicating
the sign and conversion state. The next 24-bits are the
conversion result, MSB fi rst. The remaining 5-bits are
sub LSBs beyond the 24-bit level that may be included in
averaging or discarded without loss of resolution. In the
case of ultrahigh resolution modes, more than 24 effec-
tive bits of performance are possible (see Table 3). Under
these conditions, sub LSBs are included in the conversion
result and represent useful information beyond the 24-bit
level. The third and fourth bit together are also used to
indicate an underrange condition (the differential input
voltage is below –FS) or an overrange condition (the dif-
ferential input voltage is above +FS). For input conditions
in excess of twice full scale (|V
may indicate either overrange or underrange. Once the
input returns to the normal operating range, the conversion
result is immediately accurate within the specifi cations of
the device.
Bit 31 (fi rst output bit) is the end of conversion (EOC)
indicator. This bit is available at the SDO pin during the
conversion and sleep states whenever the CS pin is LOW.
This bit is HIGH during the conversion and goes LOW
when the conversion is complete.
Bit 30 (second output bit) is a dummy bit (DMY) and is
always LOW.
Bit 29 (third output bit) is the conversion result sign
REF
where V
REF
BUSY
SDO
SCK
= REF
CS
Hi-Z
SLEEP
+
– REF
IN
BIT 31
EOC
| ≥ V
1
–
. Outside this range,
REF
BIT 30
“0”
), the converter
2
Figure 3. Output Data Timing
BIT 29
SIG
3
BIT 28
MSB
4
DATA OUTPUT
BIT 27
indicator (SIG). If V
this bit is LOW.
Bit 28 (fourth output bit) is the most signifi cant bit (MSB) of
the result. This bit in conjunction with Bit 29 also provides
the underrange or overrange indication. If both Bit 29 and
Bit 28 are HIGH, the differential input voltage is above +FS.
If both Bit 29 and Bit 28 are LOW, the differential input
voltage is below –FS.
The function of these bits is summarized in Table 1.
Table 1. LTC2440 Status Bits
Input Range
V
0V ≤ V
–0.5 • V
V
Bits ranging from 28 to 5 are the 24-bit conversion result
MSB fi rst.
Bit 5 is the Least Signifi cant Bit (LSB).
Bits ranging from 4 to 0 are sub LSBs below the 24-bit
level. Bits 4 to bit 0 may be included in averaging or dis-
carded without loss of resolution.
Data is shifted out of the SDO pin under control of the
serial clock (SCK), see Figure 3. Whenever CS is HIGH,
SDO remains high impedance.
In order to shift the conversion result out of the device,
CS must fi rst be driven LOW. EOC is seen at the SDO pin
of the device once CS is pulled LOW. EOC changes real
time from HIGH to LOW at the completion of a conversion.
This signal may be used as an interrupt for an external
IN
IN
5
≥ 0.5 • V
< –0.5 • V
IN
REF
< 0.5 • V
26
≤ V
REF
REF
IN
LSB
BIT 5
< 0V
REF
24
27
BIT 0
IN
32
is >0, this bit is HIGH. If V
Bit 31
EOC
CONVERSION
0
0
0
0
2440 F03
Bit 30
DMY
0
0
0
0
LTC2440
Bit 29
SIG
1
1
0
0
IN
11
Bit 28
MSB
is <0,
1
0
1
0
2440fd