LTC2208CUP-14 Linear Technology, LTC2208CUP-14 Datasheet
LTC2208CUP-14
Specifications of LTC2208CUP-14
Related parts for LTC2208CUP-14
LTC2208CUP-14 Summary of contents
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... Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 3.3V SENSE 1.25V INTERNAL ADC V CM ...
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... ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL LTC2208CUP-14#PBF LTC2208CUP-14#TRPBF LTC2208UP-14 LTC2208IUP-14#PBF LTC2208IUP-14#TRPBF LTC2208UP-14 Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. ...
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ANALOG INPUT The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are 25°C. (Note 4) A SYMBOL PARAMETER V Analog Input Range ( Analog Input Common ...
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LTC2208-14 DYNAMIC ACCURACY otherwise specifi cations are 25° SYMBOL PARAMETER SFDR Spurious Free Dynamic Range th 4 Harmonic or Higher S/(N+D) Signal-to-Noise Plus Distortion Ratio SFDR Spurious Free Dynamic Range at –25dBFS Dither “OFF” SFDR ...
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COMMON MODE BIAS CHARACTERISTICS the full operating temperature range, otherwise specifi cations are at T PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance CM DIGITAL INPUTS AND DIGITAL OUTPUTS full operating temperature ...
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LTC2208-14 POWER REQUIREMENTS range, otherwise specifi cations are SYMBOL PARAMETER V Analog Supply Voltage DD P Shutdown Power SHDN STANDARD LVDS OUTPUT MODE OV Output Supply Voltage DD I Analog Supply Current VDD I Output Supply Voltage ...
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ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltage values ...
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LTC2208-14 TIMING DIAGRAM ANALOG INPUT – ENC + ENC DA0-DA13, OFA CLKOUTA CLKOUTB DB0-DB13, OFB ANALOG INPUT – ENC + ENC DA0-DA13, OFA DB0-DB13, OFB CLKOUTA CLKOUTB 8 Full-Rate CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS ...
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TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (INL) vs Output Code 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 4096 8192 12288 16384 OUTPUT CODE 220814 G01 32k Point FFT 5.21MHz, IN –1dBFS, PGA = 0, ...
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LTC2208-14 TYPICAL PERFORMANCE CHARACTERISTICS SFDR vs Input Level 15.1MHz, IN PGA = 0, RAND = “On”, Dither “Off” 120 100 –80 –70 –60 –50 –40 –30 –20 –10 0 INPUT LEVEL (dBFS) 220814 ...
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TYPICAL PERFORMANCE CHARACTERISTICS SFDR vs Input Level 70.2MHz, IN PGA = 0, RAND = “On”, Dither “Off” 120 100 –80 –70 –60 –50 –40 –30 –20 –10 INPUT LEVEL (dBFS) 220814 G19 32k ...
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LTC2208-14 TYPICAL PERFORMANCE CHARACTERISTICS 32k Point FFT 250.11MHz, IN –1dBFS, PGA = 1, RAND = “On”, Dither “Off” 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 ...
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TYPICAL PERFORMANCE CHARACTERISTICS SNR and SFDR vs Duty Cycle 110 SFDR DCS ON 100 SFDR DCS OFF 90 80 SNR DCS ON 70 SNR DCS OFF DUTY CYCLE (%) 220814 G37 Input Offset Voltage Drift ...
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LTC2208-14 PIN FUNCTIONS For CMOS Mode. Full Rate or Demultiplexed SENSE (Pin 1): Reference Mode Select and External Reference Input. Tie SENSE 2.5V bandgap reference. An external reference of 2.5V or 1.25V may be used; both reference ...
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PIN FUNCTIONS PGA (Pin 64): Programmable Gain Amplifi er Control Pin. Low selects a front-end gain of 1, input range of 2.25V High selects a front-end gain of 1.5, input range of 1.5V . P-P GND (Exposed Pad): ADC Power ...
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LTC2208-14 BLOCK DIAGRAM + A IN INPUT FIRST PIPELINED S/H ADC STAGE – DITHER SIGNAL GENERATOR RANGE SELECT SENSE PGA V CM BUFFER VOLTAGE REFERENCE 16 SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED ADC STAGE ADC STAGE ADC CLOCKS ...
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OPERATION DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N+D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output ...
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LTC2208-14 APPLICATIONS INFORMATION CONVERTER OPERATION The LTC2208- CMOS pipelined multistep converter with a front-end PGA. As shown in Figure 1, the converter has fi ve pipelined ADC stages; a sampled analog input will result in a digitized value ...
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APPLICATIONS INFORMATION input change is large, such as the change seen with input frequencies near Nyquist, then a larger charging glitch will be seen. Common Mode Bias The ADC sample-and-hold circuit requires differential drive to achieve specifi ed performance. Each ...
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LTC2208-14 APPLICATIONS INFORMATION Figure 4a shows transformer coupling using a transmis- sion line balun transformer. This type of transformer has much better high frequency response and balance than fl ux coupled center tap transformers. Coupling capaci- tors are added at ...
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APPLICATIONS INFORMATION The internal programmable gain amplifi er provides the internal reference voltage for the ADC. This amplifi er has very stringent settling requirements and is not accessible for external use. The SENSE pin can be driven ±5% around the ...
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LTC2208-14 APPLICATIONS INFORMATION ENC V = 1.6V THRESHOLD 1.6V ENC 0.1μF Figure 9. Single-Ended ENC Drive, Not Recommended for Low Jitter 3.3V 3.3V MC100LVELT22 130Ω 130Ω 83Ω 83Ω Figure 10. ENC Drive Using a CMOS to PECL ...
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APPLICATIONS INFORMATION output may be used but is not required since the ADC has a series resistor of 43Ω on-chip. Lower OV voltages will also help reduce interference DD from the digital outputs. LTC2208- DATA PREDRIVER ...
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LTC2208-14 APPLICATIONS INFORMATION Overfl ow Bit An overfl ow output bit (OF) indicates when the converter is overranged or underranged. In CMOS mode, a logic high on the OFA pin indicates an overfl underfl the A ...
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APPLICATIONS INFORMATION PC BOARD FPGA CLKOUT OF D13/D0 D12/D0 LTC2208-14 D2/D0 D1/D0 D0 Figure 14. Derandomizing a Randomized Digital Output LTC2208-14 + AIN ANALOG S/H INPUT AMP – AIN CLOCK/DUTY CYCLE CONTROL + ENC Figure 15. Functional Equivalent Block Diagram ...
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LTC2208-14 APPLICATIONS INFORMATION Grounding and Bypassing The LTC2208-14 requires a printed circuit board with a clean unbroken ground plane; a multilayer board with an internal ground plane is recommended. The pinout of the LTC2208-14 has been optimized for a fl ...
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... SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. UP Package 64-Lead Plastic QFN (9mm × ...
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... SNR, 9mm × 9mm QFN Package DC to 3GHz, 21dBm IIP3, Integrated LO Buffer 450MHz 1dB BW, 47dB OIP3, Digital Gain Control 10.5dB to 33dB in 1.5dB/Step 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz 12.5dB, 50Ω Single-Ended RF and LO Ports ● www.linear.com 220814fb LT 0909 REV B • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2006 ...