HI7188IN Intersil, HI7188IN Datasheet - Page 11

• Manufacturer Part Number: HI7188IN
• Description: CONV A/D 16BIT 8:1 MUX 44-MQFP
• Manufacturer: Intersil

Specifications of HI7188IN

• Number Of Bits: 16
• Sampling Rate (per Second): 240
• Data Interface: QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

FIGURE 7. SYSTEM USAGE FLOWCHART
YES
YES
YES
NO
NO
APPLY A POSITIVE FULL SCALE INPUT
CONNECT DESIRED ANALOG INPUT,
PROGRAM THE CHANNEL LEVEL
APPLY A NEGATIVE FULL SCALE
(RESET) INITIAL SYSTEM START
IN OFFSET CALIBRATION MODE
PROGRAM THE SYSTEM LEVEL
TO PLACE EACH CHANNEL IN
TO PLACE EACH CHANNEL IN
APPLY A ZERO SCALE INPUT
TO EACH OF THE CHANNELS
AND PLACE EACH CHANNEL
RECALIBRATION REQUIRED?
CHANNEL CONFIGURATION
INPUT TO EACH CHANNEL
CONTROL REGISTER (CR)
NEGATIVE FULL SCALE
POSITIVE FULL SCALE
REPROGRAM THE CCR
REPROGRAM THE CCR
INFORMATION IN THE
INFORMATION IN THE
READ DATA RAM VIA
INTERRUPT ACTIVE?
INTERRUPT ACTIVE?
INTERRUPT ACTIVE?
INTERRUPT ACTIVE?
CALIBRATION MODE
CALIBRATION MODE
SERIAL INTERFACE
REGISTERS (CCR)
TO EACH CHANNEL
EOS OUTPUT
CA OUTPUT
CA OUTPUT
CA OUTPUT
YES
YES
11
NO
NO
NO
HI7188
The configuration can be saved by writing the contents of the
CR, CCR and calibration RAMs to microprocessor system
memory (see Serial Interface section). After this has
occurred, the configuration can easily be restored back to
the HI7188 in the event of power failure or reset.
Analog Section Description
The analog portion of the HI7188 consists of a 8 to 1 fully
differential Multiplexer, Programmable Gain Instrumentation
amplifier (PGIA) and a 4th order Sigma-Delta modulator.
Please refer to the simplified analog block diagram in Figure 8.
Analog Inputs
The analog inputs on the HI7188 are fully differential inputs
with programmable gain capabilities. The inputs accept both
unipolar and bipolar input signals and gains of 1, 2, 4 or 8.
The gain for any given physical channel is independent of
the gain of other physical channels. The gain is programmed
via the Channel Configuration Register (CCR).
The input impedance of the HI7188 is dependent upon the
modulator input sampling capacitors which varies with the
selected PGIA gain. Table 2 shows the sampling capacitors
and input impedances for the different gain settings of the
HI7188. Note that this table is valid only for a 3.6864MHz
master clock. If the input clock frequency is changed then
the input impedance will change accordingly. The equation
used to calculate the input impedance is
Z
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN1H
IN2H
IN3H
IN4H
IN5H
IN6H
IN7H
IN8H
IN1L
IN2L
IN3L
IN4L
IN5L
IN6L
IN7L
IN8L
= 1/(C
CHANNELS
PHYSICAL
S
x F
FIGURE 8. ANALOG BLOCK DIAGRAM
S
)
V
CM
PGIA
REFERENCE INPUTS
CONVERSION
MODULATOR
CONTROL
ORDER
V
4TH
RHI
V
RLO
SECTION
DIGITAL