HI7188IN Intersil, HI7188IN Datasheet - Page 9

CONV A/D 16BIT 8:1 MUX 44-MQFP

HI7188IN

Manufacturer Part Number
HI7188IN
Description
CONV A/D 16BIT 8:1 MUX 44-MQFP
Manufacturer
Intersil
Datasheet

Specifications of HI7188IN

Number Of Bits
16
Sampling Rate (per Second)
240
Data Interface
QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
50mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HI7188IN
Manufacturer:
Intersil
Quantity:
10 000
Waveforms
Definitions
Integral Non-Linearity (INL) - This is the maximum
deviation of any digital code from a straight line passing
through the endpoints of the transfer function. The endpoints
of the transfer function are zero scale (a point 0.5 LSB below
the first code transition 000...000 and 000...001) and full scale
(a point 0.5 LSB above the last code transition 111...110 to
111...111).
Differential Non-Linearity (DNL) - This is the deviation
from the actual difference between midpoints and the ideal
difference between midpoints (1 LSB) for adjacent codes. If
this difference is equal to or more negative than 1 LSB, a
code will be missed.
Offset Error (V
code transition from the ideal input voltage (V
Full Scale Error (FSE) - The full scale error is the deviation
of the last code transition from the ideal input full-scale
voltage (V
EOS
SCLK
SDIO
CS
SCLK
SDIO
SDO
CS
IN
- + V
OS
REF
(Continued)
) - The offset error is the deviation of the first
/Gain - 1.5 LSB).
t
ACC
1
9
IN
- 0.5 LSB).
5
1ST BIT
FIGURE 5. DATA READ FROM HI7188
FIGURE 6. DATA READ FROM HI7188
HI7188
6
t
DV
Input Span - The input span defines the minimum and
maximum input voltages the device can handle while still
calibrating properly for gain.
End of Scan (EOS) - The end of scan is a signal used to
indicate all active logical channels have been converted and
data is available to be read.
Line Noise Rejection - Line noise rejection is the ability to
attenuate (reject) signals at the frequency of power lines
typically 50Hz or 60Hz.
Physical/Logical Channel - A physical channel pertains to
channels which are directly connected to the device package
pins identified in the pinout. Logical channels are predefined
in the Channel Configuration Registers (CCR) with a physical
channels reference (address) being made by the user. Refer
to the Channel Configuration Registers section for examples.
7
2ND BIT
t
8
EOS

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