CS5014-BL14Z Cirrus Logic Inc, CS5014-BL14Z Datasheet - Page 30

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CS5014-BL14Z

Manufacturer Part Number
CS5014-BL14Z
Description
IC ADC 14BIT SELF-CALBR 44-PLCC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5014-BL14Z

Number Of Bits
14
Sampling Rate (per Second)
56k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
250mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1075-5

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Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
CIRRUS
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Part Number:
CS5014-BL14Z
Manufacturer:
Cirrus Logic Inc
Quantity:
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30
Signal
Amplitude
Relative to
Full Scale
Signal
Amplitude
Relative to
Full Scale
Clock Feedthrough in the CS5014 and CS5016
Maintaining the integrity of analog signals in the
presence of digital switching noise is a difficult
problem. The CS5014/16 can be synchronized to
the digital system using the CLKIN input to
avoid conversion errors due to asynchronous in-
terference. However, digital interference will still
affect sampling purity due to coupling between
the CS5014/16’s analog input and master clock.
The effect of clock feedthrough depends on the
sampling conditions. If the sampling signal at the
HOLD input is synchronized to the master clock,
clock feedthrough will appear as a dc offset at the
CS5014/16’s output. The offset could theoreti-
cally reach the peak coupling magnitude
2-36
Figure 30. CS5014 FFT plot with 12 kHz
Figure 32. CS5016 FFT plot with 12 kHz
-100dB
-120dB
-100dB
-120dB
-20dB
-40dB
-60dB
-80dB
-20dB
-40dB
-60dB
-80dB
0dB
0dB
dc
dc
Full-scale Input
Full-scale Input
12 kHz
12 kHz
Input Frequency
Input Frequency
Sampling Rate: 50 kHz
Full Scale: 9V p-p
S/(N+D): 84.3 dB
Sampling Rate: 56 kHz
Full Scale: 9V p-p
S/(N+D): 81.5 dB
28 kHz
25 kHz
Signal
Amplitude
Relative to
Full Scale
Signal
Amplitude
Relative to
Full Scale
(Figure 34), but the probability of this occurring
is small since the peaks are spikes of short dura-
tion.
If sampling is performed asynchronously with the
master clock, clock feedthrough will appear as an
ac error at the CS5014/16’s output. With a fixed
Figure 35. Examples of Measured Clock Feedthrough
Internal
External
External
External
External
Int/Ext
Master Clock
Figure 31. CS5014 FFT plot with 12 kHz
Figure 33. CS5016 FFT plot with 12 kHz
-100dB
-120dB
-100dB
-120dB
-20dB
-40dB
-60dB
-80dB
-20dB
-40dB
-60dB
-80dB
2MHz
2MHz
4MHz
4MHz
4MHz
Freq
0dB
0dB
CS5012A CS5014 CS5016
dc
dc
Source Impedance
Analog Input
CS5012A, CS5014, CS5016
-20 dB Input
-20 dB Input
200
50
50
50
25
12 kHz
12 kHz
Input Frequency
Input Frequency
RMS
15uV
25uV
40uV
25uV
80uV
Clock Feedthrough
Sampling Rate: 50 kHz
Full Scale: 9V p-p
S/(N+D): 71.9 dB
Sampling Rate: 56 kHz
Full Scale: 9V p-p
S/(N+D): 64.6 dB
Peak-to-Peak
70uV
110uV
150uV
110uV
325uV
28 kHz
25 kHz
DS14F8
DS14F9

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