CS5014-BL14Z Cirrus Logic Inc, CS5014-BL14Z Datasheet - Page 34

• Manufacturer Part Number: CS5014-BL14Z
• Description: IC ADC 14BIT SELF-CALBR 44-PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5014-BL14Z

• Number Of Bits: 14
• Sampling Rate (per Second): 56k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 250mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1075-5

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PIN DESCRIPTIONS
Power Supply Connections
VD+ – Positive Digital Power, PIN 12.
VD- – Negative Digital Power, PIN 40.
DGND – Digital Ground, PIN 11.
VA+ – Positive Analog Power, PIN 28.
VA- – Negative Analog Power, PIN 34.
AGND – Analog Ground, PIN 30.
Oscillator
CLKIN – Clock Input, PIN 23.
Digital Inputs
HOLD – Hold, PIN 1.
CS – Chip Select, PIN 24.
RD – Read, PIN 25.
DS14F8
Positive digital power supply. Nominally +5 volts.
Negative digital power supply. Nominally -5 volts.
Digital ground.
Positive analog power supply. Nominally +5 volts.
Negative analog power supply. Nominally -5 volts.
Analog ground.
All conversions and calibrations are timed from a master clock which can either be supplied by
driving this pin with an external clock signal, or can be internally generated by tying this pin to
DGND.
A falling transition on this pin sets the CS5012A/14/16 to the hold state and initiates a conversion.
This input must remain low at least one CLKIN cycle plus 50 ns.
When high, the data bus outputs are held in a high impedance state and the input to CAL and
INTRLV are ignored. A falling transition initiates or terminates burst or interleave calibration
(depending on the status of CAL and INTRLV) and a rising transition latches both the CAL and
INTRLV inputs. If RD is low, the data bus is driven as indicated by BW and A0.
When RD and CS are both low, data is driven onto the data bus. If either signal is high, the data
bus outputs are held in a high impedance state. The data driven onto the bus is determined by BW
and A0.
CS5012A CS5014 CS5016
CS5012A, CS5014, CS5016
DS14F9
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