PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 211

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PIC18F86K90-I/PT

Manufacturer Part Number
PIC18F86K90-I/PT
Description
64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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16.0
The Timer4/6/8/10/12 timer modules have the following
features:
• 8-Bit Timer register (TMRx)
• 8-Bit Period register (PRx)
• Readable and writable (all registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMRx match of PRx
Timer10 and Timer12 are unimplemented for devices
with program memory of 32 Kbytes (PIC18FX5K90).
The Timer4/6/8/10/12 modules have a control register
shown in Register 16-1. Timer4/6/8/10/12 can be shut
off by clearing control bit, TMRxON (TxCON<2>), to
minimize power consumption. The prescaler and post-
scaler selection of Timer4/6/8/10/12 also are controlled
by this register. Figure 16-1 is a simplified block
diagram of the Timer4/6/8/10/12 modules.
 2010 Microchip Technology Inc.
Note: Throughout this section, generic references
TIMER4/6/8/10/12 MODULES
are used for register and bit names that are the
same, except for an ‘x’ variable that indicates
the item’s association with the Timer4, Timer6,
Timer8, Timer10 or Timer12 module. For
example, the control register is named TxCON
and refers to T4CON, T6CON, T8CON,
T10CON and T12CON.
Preliminary
PIC18F87K90 FAMILY
16.1
Timer4/6/8/10/12 can be used as the PWM time base
for the PWM mode of the ECCP modules. The TMRx
registers are readable and writable, and are cleared on
any device Reset. The input clock (F
prescale option of 1:1, 1:4 or 1:16, selected by control
bits, TxCKPS<1:0> (TxCON<1:0>). The match output
of TMRx goes through a 4-bit postscaler (that gives a
1:1 to 1:16 inclusive scaling) to generate a TMRx
interrupt, latched in the flag bit, TMRxIF. Table 16-1
gives each module’s flag bit.
TABLE 16-1:
The interrupt can be enabled or disabled by setting or
clearing the Timerx Interrupt Enable bit (TMRxIE),
shown in Table 16-2.
TABLE 16-2:
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMRx register
• A write to the TxCON register
• Any device Reset (Power-on Reset (POR), MCLR
A TMRx is not cleared when a TxCON is written.
Reset, Watchdog Timer Reset (WDTR) or
Brown-out Reset (BOR))
Note:
Module
Module
Timer
Timer
4
6
8
4
6
8
Timer4/6/8/10/12 Operation
The CCP and ECCP modules use Timers,
1 through 8, for some modes. The assign-
ment of a particular timer to a CCP/ECCP
module is determined by the Timer to CCP
enable bits in the CCPTMRSx registers.
For more details, see Register 19-2,
Register 18-2 and Register 18-3.
PIR5<x>
PIE5<x>
Flag Bit
Flag Bit
TIMER4/6/8/10/12 FLAG BITS
TIMER4/6/8/10/12 INTERRUPT
ENABLE BITS
0
2
4
0
2
4
Module
Module
Timer
Timer
10
12
10
12
DS39957B-page 211
OSC
PIR5<x>
PIE5<x>
Flag Bit
Flag Bit
/4) has a
5
6
5
6

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