PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 61

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PIC18F86K90-I/PT

Manufacturer Part Number
PIC18F86K90-I/PT
Description
64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
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PIC18F86K90-I/PT
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Microchip Technology
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Manufacturer:
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PIC18F86K90-I/PT
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Manufacturer:
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REGISTER 4-3:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
RTCCMD can only be set to ‘1’ after an EECON2 unlock sequence; refer to Section 17.0 “Real-Time
Clock and Calendar (RTCC)” for the unlock sequence (see Example 17-1).
Unimplemented: Read as ‘0’
CTMUMD: PMD CTMU Enable/Disable bit
1 = Peripheral Module Disable (PMD) is enabled for CMTU, disabling all of its clock sources
0 = PMD is disabled for CMTU
RTCCMD: PMD RTCC Enable/Disable bit
1 = PMD is enabled for RTCC, disabling all of its clock sources
0 = PMD is disabled for RTCC
TMR4MD: TMR4MD Disable bit
1 = PMD is enabled and all TMR4MD clock sources are disabled
0 = PMD is disabled and TMR4MD is enabled
TMR3MD: TMR3MD Disable bit
1 = PMD is enabled and all TMR3MD clock sources are disabled
0 = PMD is disabled and TMR3MD is enabled
TMR2MD: TMR2MD Disable bit
1 = PMD is enabled and all TMR2MD clock sources are disabled
0 = PMD is disabled and TMR2MD is enabled
TMR1MD: TMR1MD Disable bit
1 = PMD is enabled and all TMR1MD clock sources are disabled
0 = PMD is disabled and TMR1MD is enabled
Unimplemented: Read as ‘0’
CTMUMD
R/W-0
PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
W = Writable bit
‘1’ = Bit is set
RTCCMD
R/W-0
(1)
TMR4MD
R/W-0
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
TMR3MD
R/W-0
TMR2MD
R/W-0
x = Bit is unknown
TMR1MD
R/W-0
DS39957B-page 61
R/W-0
bit 0

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