MT46H16M32LFCM-75 L Micron Technology Inc, MT46H16M32LFCM-75 L Datasheet - Page 80

• Manufacturer Part Number: MT46H16M32LFCM-75 L
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H16M32LFCM-75 L

• Organization: 16Mx32
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 6.5/6ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 42: WRITE-to-PRECHARGE – Uninterrupting
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DQ
DQ
DQ
DM
DM
DM
CK
1
6
6
6
WRITE
Bank a,
Col b
T0
Notes:
2,4
t
DQSS
t
DQSS
t
DQSS
1. An uninterrupted burst 4 of is shown.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4. The PRECHARGE and WRITE commands are to the same device. However, the PRE-
5.
6. D
D
IN
CHARGE and WRITE commands can be to different devices; in this case,
required and the PRECHARGE command can be applied earlier.
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
D
IN
T1
IN
b = data-in for column b.
D
D
IN
IN
T1n
D
IN
D
D
IN
IN
NOP
D
T2
IN
D
D
IN
IN
T2n
D
IN
80
D
IN
NOP
T3
512Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
NOP
WR
T4
5
Don’t Care
(a or all)
PRE
T5
Bank
© 2004 Micron Technology, Inc. All rights reserved.
3,4
WRITE Operation
Transitioning Data
t
WR is not
T6
NOP