MT9HTF6472FY-667D5E4 Micron Technology Inc, MT9HTF6472FY-667D5E4 Datasheet - Page 7

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MT9HTF6472FY-667D5E4

Manufacturer Part Number
MT9HTF6472FY-667D5E4
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT9HTF6472FY-667D5E4

Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240FBDIMM
Device Core Size
72b
Organization
64Mx72
Total Density
512MByte
Chip Density
512Mb
Package Type
FBDIMM
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Number Of Elements
9
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / Rohs Status
Compliant
Advanced Memory Buffer
Electrical Specifications
Table 7: Absolute Maximum Ratings
PDF: 09005aef81a2f1eb
htf9c64_128x72fy.pdf - Rev. C 12/09 EN
Parameter
Voltage on any pin relative to V
Voltage on V
Voltage on V
Voltage on V
DDR2 SDRAM device operating case temperature
AMB device operating temperature
CC
DD
TT
pin relative to V
pin relative to V
pin relative to V
Notes:
• FBDIMM Design Specification – pending JEDEC approval
• FBDIMM: Architecture and Protocol – JESD206
• FBDIMM: Advanced Memory Buffer (AMB) – JESD82-20
• Design for Test, Design for Validation (DFx) Specification
• Serial Presence-Detect (SPD) for Fully Buffered DIMM – JEDEC Standard No. 21-C,
This DDR2 SDRAM module is a high-bandwidth, large-capacity channel solution that
has a narrow host interface. FBDIMM devices use DDR2 SDRAM devices isolated from
the channel behind an AMB buffer on the FBDIMM. Memory device capacity remains
high, and total memory capacity scales with DDR2 SDRAM bit density.
As shown in the System Block Diagram, the FBDIMM channel provides a communica-
tion path from a host controller to an array of DDR2 SDRAM devices, with the DDR2
SDRAM devices buffered behind an AMB device. The physical isolation of the DDR2
SDRAM devices from the channel enhances the communication path and significantly
increases the reliability and availability of the memory subsystem.
The AMB isolates the DDR2 SDRAM devices from the channel. This single-chip AMB
component, located in the center of each FBDIMM, acts as a repeater and buffer for all
signals and commands exchanged between the host controller and DDR2 SDRAM devi-
ces, including data input and output. The AMB communicates with the host controller
and adjacent FBDIMMs on a system board using an industry-standard, high-speed, dif-
ferential, 1.5V, point-to-point interface. The AMB also enables buffering of memory
traffic to support large memory capacities. Refer to the JEDEC JESD82-20 specification
for further information.
Stresses greater than those listed may cause permanent damage to the module. This is a
stress rating only, and functional operation of the module at these or any other condi-
tions outside those indicated in the device data sheet is not implied. Exposure to
absolute maximum rating conditions for extended periods may adversely affect reliability.
page 4.1.2.7-1
1. V
2. T
SS
SS
SS
SS
t
REFI = 3.9µs above 85°C); refer to the DDR2 SDRAM component data sheet.
C
IN
is specified at 95°C only when using 2X refresh timing (
should not be greater than V
512MB, 1GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM
Symbol
V
IN
V
V
V
, V
T
DD
CC
TT
C
OUT
7
CC
.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Min
–0.3
–0.3
–0.5
–0.5
0
0
+1.75
+1.75
+110
Max
+2.3
+2.3
+95
Electrical Specifications
t
REFI = 7.8µs at or below 85°C;
© 2005 Micron Technology, Inc. All rights reserved.
Units
°C
°C
V
V
V
V
Notes
2, 3
1

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