STM32W108HBU6 STMicroelectronics, STM32W108HBU6 Datasheet - Page 105

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STM32W108HBU6

Manufacturer Part Number
STM32W108HBU6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108HBU6

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
1.18V
Operating Supply Voltage (typ)
1.25V
Operating Supply Voltage (max)
1.32V
Package Type
VFQFPN EP
Pin Count
40
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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STM32W108CB, STM32W108HB
10
Note:
General-purpose timers
Each of the STM32W108's two general-purpose timers consists of a 16-bit auto-reload
counter driven by a programmable prescaler. They may be used for a variety of purposes,
including measuring the pulse lengths of input signals (input capture) or generating output
waveforms (output compare and PWM). Pulse lengths and waveform periods can be
modulated from a few microseconds to several milliseconds using the timer prescaler. The
timers are completely independent, and do not share any resources. They can be
synchronized together as described in
The two general-purpose timers, TIM1 and TIM2, have the following features:
Because the two timers are identical, the notation TIMx refers to either TIM1 or TIM2. For
example, TIMx_PSC refers to both TIM1_PSC and TIM2_PSC. Similarly, "y" refers to any of
the four channels of a given timer, so for example, OCy refers to OC1, OC2, OC3, and OC4.
16-bit up, down, or up/down auto-reload counter.
Programmable prescaler to divide the counter clock by any power of two from 1 through
32768.
4 independent channels for:
PWM generation (edge- and center-aligned mode)
One-pulse mode output
Synchronization circuit to control the timer with external signals and to interconnect the
timers.
Flexible clock source selection:
GPIO input
Interrupt generation on the following events:
Input capture
Output compare
Supports incremental (quadrature) encoders and Hall sensors for positioning
applications.
Trigger input for external clock or cycle-by-cycle current management.
Input capture
Output compare
Peripheral clock (PCLK at 6 or 12 MHz)
32 kHz external clock (if available)
1 kHz clock
Update: counter overflow/underflow, counter initialization (software or
internal/external trigger)
Trigger event (counter start, stop, initialization or count by internal/external trigger)
Doc ID 16252 Rev 7
Section 10.1.14: Timer synchronization on page
General-purpose timers
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132.

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