PEB2445NV1.2 Lantiq, PEB2445NV1.2 Datasheet - Page 34

• Manufacturer Part Number: PEB2445NV1.2
• Manufacturer: Lantiq

Specifications of PEB2445NV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

PEB 2445
Functional Description
In the primary access configuration only those modes which support at least 4 input and
4 output lines at 2048 kbit/s can be used. These are the modes Ml1, Ml0, MO1, MO0 =
0
, A
, F
(see table 7). Programming the CM in the primary access configuration is
H
H
H
described in tables 8, 13 and 14. The attenuations are programmed in the same way as
in the standard configuration. The least significant 2 bits of the data byte and the least
significant bit of the address byte determine the type of interface, the more significant
bits define the logical line number and time-slot number.
According to figure 15 in the primary access configuration the connection memory is
usually programmed to switch the system and synchronous interface inputs to the
synchronous and system interface outputs, respectively. However, it is also possible to
connect the system interface inputs to the system interface outputs as well as the
synchronous interface inputs to the synchronous interface outputs. This connection
possibility allows for test loops at the system and the synchronous interfaces.
Figure 15
Connection Choices in the Primary Access Configuration
Semiconductor Group
34
02.96