PEB2445NV1.2 Lantiq, PEB2445NV1.2 Datasheet - Page 40

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PEB2445NV1.2

Manufacturer Part Number
PEB2445NV1.2
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB2445NV1.2

Lead Free Status / Rohs Status
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Figure 19
Initializing the PEB 2445 for a 4096-kHz Device Clock
3.3
In order for the MUSAC-A to operate with a 4096-kHz device clock the CPS bit in the
CFR register needs to be reset. This has to be done before the CM reset and needs
1.8 s. For a flow chart of this process refer to figure 19.
3.4
With MOD:SB being logical 1 the MUSAC-A works as a backup device in redundant
systems. It can be accessed via the P interface and works internally like an active
device. However, the outputs are high impedance. If the SB bit is reset, the outputs are
switched to low impedance for the programmed active channels and this MUSAC-A can
take over from another device which has been recognized as being faulty.
Semiconductor Group
Operation with a 4096-kHz Device Clock
Standby Mode
40
Operational Description
PEB 2445
02.96

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