PEB2445NV1.2 Lantiq, PEB2445NV1.2 Datasheet - Page 48

• Manufacturer Part Number: PEB2445NV1.2
• Manufacturer: Lantiq

Specifications of PEB2445NV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Access to CM
D9
D8
IA7
C3
D9 – D0
D9
D8
D5
IA7
C3
D9 – D0
D8 – D0 and IA7 – IA0 contain the information for the logical line and time-slot numbers
of the programmed connection, D8 – D0 for the inputs, IA7 – IA0 for the outputs.
Table 12 shows the programming of these bits for standard configuration, table 13 and
14 for the primary access configuration.
Semiconductor Group
D0
IA0
C0,
D6
D0
C0,
IA0
Transparent Switching (i.e. the MUSAC-A works exactly like a MTSC)
C3
Validity bit: A logical 0 enables the programmed connection,
a logical 1 tristates the outputs
Logical line and time-slot number of the inputs
Logical line and time-slot number of the outputs
Is written to the CM address IA7 – IA0
Conference switching or multipoint switching mode C3
Validity bit: A logical 0 enables the programmed connection,
a logical 1 tristates the outputs
Output attenuation
Conference control address
Logical line and time-slot number of the outputs
Is written to the CM address IA7 – IA0. D5 – D0 contain the address
which points to the appropriate CCM location.
C0 = 0
H
, 2
H
, 4
H
– F
H
48
Detailed Register Description
C0 = 1
PEB 2445
H
02.96
, 3
H