EWIXP425BBT Intel, EWIXP425BBT Datasheet - Page 120

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EWIXP425BBT

Manufacturer Part Number
EWIXP425BBT
Description
Manufacturer
Intel
Datasheet

Specifications of EWIXP425BBT

Core Operating Frequency
266MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
5.5.2.7.1
Figure 40.
Intel
Datasheet
120
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Note:
EX_IOWAIT_N
I/O Wait Normal Phase Timing
The EX_IOWAIT_N signal is available to be shared by devices attached to chip selects 0
through 7, when configured in Intel or Motorola modes of operation. The main purpose
of this signal is to properly communicate with slower devices requiring more time to
respond during data access. During idle cycles, the board is responsible for ensuring
that EX_IOWAIT_N is pulled-up. The Expansion bus controller will always ignore
EX_IOWAIT_N for synchronous Intel mode writes.
Refer to the Using I/O Wait sub-section in the Expansion Bus Controller chapter of the
Intel
Processor Developer’s Manual for detailed information.
EX_ADDR[23:0]
EX_DATA[15:0]
EX_ IOWAIT_N
EX_CS_ N[0]
Notice that the access is an Intel-style simplex read access. The data strobe phase is set to a value to last
three clock cycles. The data is returned from the peripheral device prior to the three clocks and the
peripheral device de-asserts EX_IOWAIT_N. The data strobe phase terminates after two clocks even though
the strobe phase was configured to pulse for three clocks.
EX_RD_N
®
EX_ CLK
IXP42X Product Line of Network Processors and IXC1100 Control Plane
T1=0 h
1 Cycle
Intel
T2=0 h
1 Cycle
Valid Address
®
IXP42X product line and IXC1100 control plane processors
T3=2h or 1h or 0h
Valid Data
3 Cycles
2 Cycles
Document Number: 252479-006US
T4=0 h
1 Cycle
T5=0 h
1 Cycle
August 2006
B5242 -01

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