MCC501RX200TD0B Freescale Semiconductor, MCC501RX200TD0B Datasheet - Page 16

• Manufacturer Part Number: MCC501RX200TD0B
• Manufacturer: Freescale Semiconductor

Specifications of MCC501RX200TD0B

• Package Type: BGA
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

16
C5NP
Table 2 C-5 Network Processor Data Sheet Revision History
REVISION DATE
August 8, 2000
March 26, 2001
CHANGE
Operating temperatiure range added.
Power sequencing diagram updated.
BMU timing diagram updated.
TLU timing diagram updated.
QMU timing diagram updated.
Chapter 1 contains the following revisions:
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Chapter 2 contains the following revisions:
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Chapter 3 contains the following revisions:
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Chapter 4 contains the following revisions:
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Fabric Processor Interface Frequency changed from 100
MHz to 110 MHz thruoughout.
TLU interface memory was incorrectly noted at 64 MBytes.
Changed to 32 MBytes.
The maximum amount of memory supported by the TLU is
32MBytes in four banks.
Buffer Management Unit (BMU) has 161 pins
Added Figure 5. PROM Interface Timing Outline
Added Figure 7. Observe-Only Cell
Added Figure 8. Cell Design That Can Be Used for Both
Input and Output Pins
PROM Interface Timing Outline added.
Numerous changes in tables 17, 18 and 19
Data lines incorrectly noted at 128. The useful
configuration is 139 data lines and all 12 address lines.
The TLU SRAM interface was incorrectly noted at 64
MBytes. Changed to 32 MBytes.
Table 40, Gigabit Ethernet (TBI) Timing Description, Tcgr
min value of -1.0 removed.
Figure 16, OC 12 Clock Duty Cycle was added
Tc12d added to Table 42
Figure 17, Executive Processor PCI Timing Diagram PGNTX
is only an input. PGNTX Output removed.
Tpgo, Tpgz, Tpgv removed from Table 43.
Mechanical specs changed.
PAGE NO.
54
56
75
77
78
Thru-out
18
19
21
37
57
36
39, 40
41
42
71
73
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75