MCC501RX200TD0B Freescale Semiconductor, MCC501RX200TD0B Datasheet - Page 86
MCC501RX200TD0B
Manufacturer Part Number
MCC501RX200TD0B
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MCC501RX200TD0B.pdf
(100 pages)
Specifications of MCC501RX200TD0B
Package Type
BGA
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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CHAPTER 3: ELECTRICAL SPECIFICATIONS
Specifications
BMU Timing
Table 50 Fabric Processor Timing Description (continued)
*
The BMU timing specifications are shown in
The BMU synchronous DRAM interface is PC100-compliant and designed to work with
industry standard SDRAM components with 12 or fewer address lines. The information
below is intended to provide the output, setup, and hold data required to design this
interface without duplicating the transaction waveform diagrams in SDRAM data sheets.
SYMBOL
Tfrco
Tfrcz
Tfrcv
Tfrds
Tfrdh
Tftc
Tftcs
Tftch
Tftco
Tftcz
Tftcv
Tftdo
Not fully tested, values based on design/characterization.
PARAMETER
FRXCTL Output
FRXCTL Clk to Tri*
FRXCTL Clk to Driven*
FIN Setup
FIN Hold
FTX Cycle Time
FTXCTL Setup
FTXCTL Hold
FTXCTL Output
FTXCTL Clk to Tri*
FTXCTL Tri to Driven*
FOUT Output
MIN
1.0
1.8
1.3
4.0
1.5
0.5
9.0
4.0
1.5
0.5
1.0
1.7
1.3
1.0
Figure 23
TYP
and described in
MAX
3.4
5.5
5.5
3.6
5.5
5.5
3.6
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table
COMMENT
Utopia2 Mode
All other modes
Utopia2 Mode
All other modes
51.
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