MCC501RX200TD0B Freescale Semiconductor, MCC501RX200TD0B Datasheet - Page 53

• Manufacturer Part Number: MCC501RX200TD0B
• Manufacturer: Freescale Semiconductor

Specifications of MCC501RX200TD0B

• Package Type: BGA
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Table 28 Miscellaneous Test Signals For JTAG, Scan, and Internal Test Routines
*
Table 29 No Connection Pins
Signals Grouped by Pin
Number
SIGNAL NAME
JTCK
JTMS*
JTRSTX†
JTDI†
JTDO
JHIGHZ
JCLKBYP
JSE
JS00-JS09
TOTAL PINS
SIGNAL NAME
NC1 - NC11
TOTAL PINS
According to the IEEE 1149.1 specification, the JTMS, JTRST, and JTDI pins must have internal pullups. While the C-5 NP does not currently have pads
with pullups, customers can pull up these three pins on the board.
No Connection Pins
PIN #
T11
Z15
X15
AB15
V15
T12
T13
S12
L12, N13, N12, P13, P12, Q12, R13, R12,
R11, R10
PIN #
I18, H17, H18, N10, P10, N11, P11, U14,
V14, U16, V16
During JTAG, SCLK and SCLKX must remain as differential inputs.
No connection pins are listed in
The C-5 NP signals are listed by pin number in
TOTAL
1
1
1
1
1
1
1
1
10
18
TOTAL
11
11
Table
29.
TYPE
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
TYPE
nc
Table
SIGNAL DESCRIPTION
Test Clock
Test Mode Select. High selects modes
as defined in the IEEE 1149.1 JTAG
specification.
Test Reset (low active)
Test Data In
Test Data Out
Turns off all output drivers when High
1X or 2X Clock Mode Select. Low
selects 1X, High selects 2X.
Scan Enable. High enables scan test.
Scan Out Pins
SIGNAL DESCRIPTION
Reserved for future functionality
30.
Signals Grouped by Pin Number
V 04
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