MT48LC16M16LFTG-75 Micron Technology Inc, MT48LC16M16LFTG-75 Datasheet - Page 19
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MT48LC16M16LFTG-75
Manufacturer Part Number
MT48LC16M16LFTG-75
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC16M16LFTG-75.pdf
(61 pages)
Specifications of MT48LC16M16LFTG-75
Lead Free Status / Rohs Status
Not Compliant
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256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
COMMAND
COMMAND
COMMAND
NOTE: Each READ command may be to either bank. DQM is LOW.
ADDRESS
ADDRESS
ADDRESS
CLK
CLK
CLK
DQ
DQ
DQ
CAS Latency = 1
T0
T0
T0
BANK,
BANK,
BANK,
COL n
COL n
COL n
READ
READ
READ
CAS Latency = 2
CAS Latency = 3
Random READ Accesses
T1
T1
T1
BANK,
BANK,
READ
READ
READ
BANK,
COL a
COL a
COL a
D
OUT
n
T2
BANK,
T2
BANK,
T2
COL x
COL x
BANK,
READ
READ
READ
COL x
Figure 8
D
D
OUT
OUT
a
n
19
TRANSITIONING DATA
T3
T3
T3
BANK,
COL m
BANK,
COL m
READ
READ
READ
BANK,
COL m
D
D
D
OUT
OUT
OUT
x
a
n
T4
T4
T4
NOP
NOP
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
D
D
OUT
m
OUT
OUT
a
x
T5
T5
NOP
NOP
D
D
OUT
m
OUT
x
DON’T CARE
T6
MOBILE SDRAM
NOP
D
OUT
©2003 Micron Technology, Inc. All rights reserved.
m
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