MT48LC16M16LFTG-75 Micron Technology Inc, MT48LC16M16LFTG-75 Datasheet - Page 32
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT48LC16M16LFTG-75
Manufacturer Part Number
MT48LC16M16LFTG-75
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC16M16LFTG-75.pdf
(61 pages)
Specifications of MT48LC16M16LFTG-75
Lead Free Status / Rohs Status
Not Compliant
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NOTE (continued):
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with auto precharge enabled and
11. Does not affect the state of the bank and acts as a NOP to that bank.
5. The following states must not be interrupted by any executable command; COMMAND INHIBIT or NOP commands must
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid state for precharging.
9. Deep Power-Down is a power savings feature of this Mobile SDRAM device. This command is Burst Terminate on
be applied on each positive clock edge during these states.
traditional SDRAM components. For Mobile SDRAM devices, this command sequence is assigned to Deep Power Down.
READs or WRITEs with auto precharge disabled.
Precharging All: Starts with registration of a PRECHARGE ALL command and ends when
Accessing Mode
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
Register: Starts with registration of a LOAD MODE REGISTER command and ends when
met, the SDRAM will be in the all banks idle state.
met. Once
met, all banks will be in the idle state.
t
MRD is met, the SDRAM will be in the all banks idle state.
32
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MOBILE SDRAM
©2003 Micron Technology, Inc. All rights reserved.
256Mb: x16
t
t
RC is met. Once
RP is met. Once
PRELIMINARY
t
MRD has been
t
t
RP is
RC is
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