MT48LC16M16LFTG-75 Micron Technology Inc, MT48LC16M16LFTG-75 Datasheet - Page 52
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT48LC16M16LFTG-75
Manufacturer Part Number
MT48LC16M16LFTG-75
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC16M16LFTG-75.pdf
(61 pages)
Specifications of MT48LC16M16LFTG-75
Lead Free Status / Rohs Status
Not Compliant
- Current page: 52 of 61
- Download datasheet (2Mb)
NOTE:
*CAS latency indicated in parentheses.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
A0-A9, A11, A12
TIMING PARAMETERS
DQML, DQMU
SYMBOL*
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
COMMAND
BA0, BA1
DQM/
CLK
CKE
A10
DQ
1. For this example, the burst length = 4, and the CAS latency = 2.
2. x16: A9, A11 and A12 = “Don’t Care”
t CKS
t CMS t CMH
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t AH
t AH
t AH
t RCD
t CK
MIN
2.5
10
20
1
3
3
8
T1
NOP
-8
MAX
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
19
7
8
t CMS
t CL
COLUMN m 2
MIN
2.5
10
12
25
T2
READ
BANK
1
3
3
t CMH
READ – DQM OPERATION
t CH
-10
CAS Latency
MAX
22
7
8
T3
UNITS
NOP
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LZ
t AC
52
T4
NOP
t OH
D
SYMBOL*
t
t
t
t
t
t
t
t
t
t
t HZ
CKH
CKS
CMH
CMS
HZ (3)
HZ (2)
HZ (1)
LZ
OH
RCD
OUT
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T5
NOP
t
LZ
t AC
1
T6
NOP
D
t OH
t AC
OUT
MIN
2.5
2.5
2.5
20
1
1
1
m + 2
MOBILE SDRAM
-8
©2003 Micron Technology, Inc. All rights reserved.
MAX
19
7
8
T7
NOP
256Mb: x16
D
OUT
t OH
t HZ
PRELIMINARY
m + 3
MIN
2.5
2.5
2.5
20
1
1
1
-10
MAX
T8
NOP
22
7
8
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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