BOXD865PERL Intel, BOXD865PERL Datasheet - Page 28

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BOXD865PERL

Manufacturer Part Number
BOXD865PERL
Description
Manufacturer
Intel
Datasheet

Specifications of BOXD865PERL

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel Desktop Board D865PERL Technical Product Specification
1.7 Intel
1.7.1 AGP
28
The Intel 865PE chipset consists of the following devices:
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH5 is a centralized controller for the Desktop
Board D865PERL’s I/O paths. The FWH provides the nonvolatile storage of the BIOS. The
component combination provides the chipset interfaces as shown in Figure 8.
The AGP connector supports the following:
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the PCI Local Bus Specification, Rev. 2.2, AGP is independent of the PCI bus and
For information about
The Intel 865PE chipset
Resources used by the chipset
Intel 82865PE Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
Intel 82801EB I/O Controller Hub (ICH5) with AHA bus or Intel 82801ER I/O Controller
HUB (ICH5-R)
Intel 82802AB (4 Mbit) Firmware Hub (FWH)
4x, 8x AGP 3.0 add-in cards with 0.8 V I/O
1x, 4x AGP 2.0 add-in cards with 1.5 V I/O
Interface
CSA
®
865PE Chipset
Interface
AGP
System Bus
Memory Controller
Hub (MCH)
82865PE
Figure 8. Intel 865PE Chipset Block Diagram
Dual-Channel
DDR SDRAM
Bus
865PE Chipset
IDE Interface
Parallel ATA
AHA
Bus
Interface
Serial
ATA
IDE
82801EB (ICH5) or
82801ER (ICH5-R)
I/O Controller Hub
SMBus
Bus
PCI
AC Link
CSMA/CD
Interface
LPC Bus
USB
Refer to
http://developer.intel.com
Chapter 2
4 Mbit Firmware
Hub (FWH)
82802AB
OM16103