BOXD865PERL Intel, BOXD865PERL Datasheet - Page 56

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BOXD865PERL

Manufacturer Part Number
BOXD865PERL
Description
Manufacturer
Intel
Datasheet

Specifications of BOXD865PERL

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel Desktop Board D865PERL Technical Product Specification
2.6 Interrupts
56
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH5 component. The PIC is
supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts.
Table 17.
Notes:
1.
2.
IRQ
NMI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Default, but can be changed to another IRQ.
Available in APIC mode only.
Interrupts
System Resource
I/O channel check
Reserved, interval timer
Reserved, keyboard buffer full
Reserved, cascade interrupt from slave PIC
COM2
COM1
LPT2 (Plug and Play option)/User available
Diskette drive
LPT1
Real-time clock
Reserved for ICH5 system management bus
User available
User available
Onboard mouse port (if present, else user available)
Reserved, math coprocessor
Primary IDE/Serial ATA (if present, else user available)
Secondary IDE/Serial ATA (if present, else user available)
USB UHCI controller 1 and USB UHCI controller 4 (through PIRQA)
AC ‘97 audio/modem/User available (through PIRQB)
ICH5 USB controller 3 (through PIRQC)
ICH5 USB controller 2 (through PIRQD)
ICH5 LAN (through PIRQE)
User available (through PIRQF)
User available (through PIRQG)
ICH5 USB 2.0 EHCI controller/User available (through PIRQH)
(Note 1)
(Note 1)
(Note 1)