SI3018-F-FSR Silicon Laboratories Inc, SI3018-F-FSR Datasheet - Page 78

Modem Chip Chipset 16-Pin SOIC T/R

SI3018-F-FSR

Manufacturer Part Number
SI3018-F-FSR
Description
Modem Chip Chipset 16-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3018-F-FSR

Package
16SOIC
Main Category
Chipset
Sub-category
Data/Voice
Typical Operating Supply Voltage
3.3 V
Power Supply Type
Digital
Typical Supply Current
8.5 mA
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Data Rate
54.6875Kbps
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
16
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant

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Si3050 + Si3018/19
Register 24. Ring Validation Control 3
Reset settings = 0001_1001
Register 25. Resistor Calibration
Reset settings = xx0x_xxxx
78
Bit
5:0
Bit
3:0
7
6
7
6
5
4
Name
Name
Type
Type
Bit
Bit
RCAL[3:0] Always write back the value read.
Reserved
RCALM
RCALS
RCALD
Reserved
Name
RAS[5:0]
RNGV
Name
RCALS
RNGV
R/W
D7
D7
R
Resistor Auto Calibration.
0 = Resistor calibration is not in progress.
1 = Resistor calibration is in progress.
Manual Resistor Calibration.
0 = No calibration.
1 = Initiate manual resistor calibration. (After a manual calibration has been initiated, this bit
must be cleared within 1 ms.)
Resistor Calibration Disable.
0 = Internal resistor calibration enabled.
1 = Internal resistor calibration disabled.
This bit can be written to a 0 or 1.
Ring Validation Enable.
0 = Ring validation feature is disabled.
1 = Ring validation feature is enabled in both normal operating mode and low-power
mode.
This bit must always be written to 0.
Ring Assertion Time.
These bits set the minimum ring frequency for a valid ring signal. During ring qualification,
a timer is loaded with the RAS[5:0] field upon a TIP/RING event and decrements at a reg-
ular rate. If a second or subsequent TIP/RING event occurs after the timer has timed out
then the frequency of the ring is too low and the ring is invalidated. The difference between
RAS[5:0] and RMX[5:0] identifies the minimum duration between TIP/RING events to qual-
ify as a ring, in binary-coded increments of 2.0 ms (nominal). A TIP/RING event typically
occurs twice per ring tone period. At 20 Hz, TIP/RING events would occur every
1/(2 x 20 Hz) = 25 ms. To calculate the correct RAS[5:0] value for a frequency range
[f_min, f_max], the following equation should be used:
RCALM
R/W
D6
D6
RCALD
R/W
D5
D5
Rev. 1.31
RAS 5:0
D4
D4
Function
Function
------------------------------------------ -
2 f_min
D3
D3
RAS[5:0]
1
R/W
2 ms
D2
D2
RCAL[3:0]
R/W
D1
D1
D0
D0

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