ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 77

• Manufacturer Part Number: ST72F324BK6TAS
• Description: 8-BIT MCU
• Manufacturer: STMicroelectronics

ST72324B-Auto
Note:
16-bit read sequence
The 16-bit read sequence (from either the Counter register or the Alternate Counter
register) is illustrated in the
Figure 35.
The user must first read the MSB, afterwhich the LSB value is automatically buffered.
This buffered value remains unchanged until the 16-bit read sequence is completed, even if
the user reads the MSB several times.
After a complete reading sequence, if only the CLR register or ACLR register are read, they
return the LSB of the count value at the time of the read.
Whatever the timer mode used (input capture, output compare, one pulse mode or PWM
mode) an overflow occurs when the counter rolls over from FFFFh to 0000h then:
●
●
If one of these conditions is false, the interrupt remains pending to be issued as soon as
they are both true.
Clearing the overflow interrupt request is done in two steps:
1.
2.
The TOF bit is not cleared by access to the ACLR register. The advantage of accessing the
ACLR register rather than the CLR register is that it allows simultaneous use of the overflow
function and reading the free running counter at random times (for example, to measure
elapsed time) without the risk of clearing the TOF bit erroneously.
The timer is not affected by Wait mode.
In Halt mode, the counter stops counting until the mode is exited. Counting then resumes
from the previous count (MCU awakened by an interrupt) or from the reset count (MCU
awakened by a reset).
The TOF bit of the SR register is set.
A timer interrupt is generated if:
–
–
Reading the SR register while the TOF bit is set.
An access (read or write) to the CLR register.
TOIE bit of the CR1 register is set and
I bit of the CC register is cleared.
16-bit read sequence
At t0 +t
Beginning of the sequence
At t0
Sequence completed
followingFigure
Doc ID13466 Rev 4
Read
instructions
Read
Other
MSB
LSB
35.
Returns the buffered
LSB value at t0
LSB is buffered
On-chip peripherals
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