DSPB56725AF Freescale Semiconductor, DSPB56725AF Datasheet - Page 25

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DSPB56725AF

Manufacturer Part Number
DSPB56725AF
Description
DSP 24BIT AUD 250MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheets

Specifications of DSPB56725AF

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
250MHz
Non-volatile Memory
External
On-chip Ram
112kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Processor Series
DSP567xx
Core
56300
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPB56725AF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSPB56725AF
0
Freescale Semiconductor
No.
71
72
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74
75
76
77
78
79
80
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82
83
84
85
86
87
88
89
90
91
Data in setup time before SCKR (SCK in synchronous
mode) falling edge
Data in hold time after SCKR falling edge
FSR input (bl, wr) high before SCKR falling edge
FSR input (wl) high before SCKR falling edge
FSR input hold time after SCKR falling edge
Flags input setup before SCKR falling edge
Flags input hold time after SCKR falling edge
SCKT rising edge to FST out (bl) high
SCKT rising edge to FST out (bl) low
SCKT rising edge to FST out (wr) high
SCKT rising edge to FST out (wr) low
SCKT rising edge to FST out (wl) high
SCKT rising edge to FST out (wl) low
SCKT rising edge to data out enable from high impedance
SCKT rising edge to transmitter #0 drive enable assertion
SCKT rising edge to data out valid
SCKT rising edge to data out high impedance
SCKT rising edge to transmitter #0 drive enable
deassertion
FST input (bl, wr) setup time before SCKT falling edge
FST input (wl) setup time before SCKT falling edge
FST input hold time after SCKT falling edge
7
Symphony
Characteristics
Table 11. Enhanced Serial Audio Interface Timing (Continued)
DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2
1, 2, 3
6
6
7
6
6
Symbol Expression
3
19.0
12.0
12.0
19.0
18.0
18.0
Min
0.0
3.5
9.0
2.0
2.0
2.5
8.5
0.0
6.0
0.0
2.0
2.0
4.0
5.0
Max
18.0
20.0
10.0
20.0
10.0
22.0
12.0
15.0
15.0
10.0
22.0
17.0
17.0
11.0
25.0
13.0
25.0
16.0
14.0
8.0
9.0
9.0
Condition
i ck a
i ck a
i ck a
i ck s
i ck s
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25

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