DSPB56725AF Freescale Semiconductor, DSPB56725AF Datasheet - Page 34
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DSPB56725AF
Manufacturer Part Number
DSPB56725AF
Description
DSP 24BIT AUD 250MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Specifications of DSPB56725AF
Interface
Host Interface, I²C, SAI, SPI
Clock Rate
250MHz
Non-volatile Memory
External
On-chip Ram
112kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Processor Series
DSP567xx
Core
56300
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPB56725AF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.2.9
Table 16
34
LCLK cycle time
LCLK skew to LSYNC_OUT
Input setup to LSYNC_IN (except LGTA/LUPWAIT)
Input hold from LSYNC_IN (except LGTA/LUPWAIT)
LGTA valid time
LUPWAIT valid time
LALE negedge to LAD (address phase) invalid (address latch hold time)
LALE valid time
Output setup from LSYNC_IN (except LAD[23:0] and LALE)
Output hold from LSYNC_IN (except LAD[23:0] and LALE)
LAD[23:0] output setup from LSYNC_IN
LAD[23:0] output hold from LSYNC_IN
LSYNC_IN to output high impedance for LAD[23:0]
lists the EMC timing parameters with EMC PLL enabled.
EMC Timing Specifications—DSP56724
Table 16. EMC Timing Parameters (EMC PLL Enabled; LCRR[CLKDIV] = 2)
Symphony
Parameter
The DSP56725 device does not have an EMC module.
™
DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2
NOTE
T
Symbol
T
clk_skew
T
T
T
T
T
T
T
T
T
upwait
T
ale_h
T
out_s
out_h
ad_s
ad_h
ad_z
in_h
in_s
ale
gta
clk
2 × T c
Min
3.8
3.5
1.5
12
12
—
—
3
2
3
4
2
Freescale Semiconductor
Max
160
4.3
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns