DSPB56725AF Freescale Semiconductor, DSPB56725AF Datasheet - Page 37
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
DSPB56725AF
Manufacturer Part Number
DSPB56725AF
Description
DSP 24BIT AUD 250MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Specifications of DSPB56725AF
Interface
Host Interface, I²C, SAI, SPI
Clock Rate
250MHz
Non-volatile Memory
External
On-chip Ram
112kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Processor Series
DSP567xx
Core
56300
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPB56725AF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 28
Table 18
Freescale Semiconductor
LCLK cycle time
Input setup to LCLK (except LGTA/LUPWAIT)
Input hold from LCLK (except LGTA/LUPWAIT)
LGTA valid time
LUPWAIT valid time
LALE negedge to LAD (address phase) invalid (address latch hold time)
LALE valid time
lists the EMC timing parameters with EMC PLL bypassed.
shows the EMC signals diagram, with EMC PLL bypassed.
LSDWE/LSDRAS/LSDCAS
LA[2:0]/LBCTL/LCS[7:0]
LCKE/LSDA10/LSDDQM
LGPL[5:0]
LOE/LWE
Output Signals
Table 18. EMC Timing Parameters (EMC PLL Bypassed; LRCC[CLKDIV] = 8)
LGTA
LUPWAIT
LAD[23:0] (data)
Figure 28. EMC Signals (EMC PLL Bypassed; LRCC[CLKDIV] = 4
Symphony
LCLK
LAD[23:0]
LALE
Parameter
™
DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2
asynchronous input
asynchronous input
1
T
T
ad_s
out_s
T
ale
T
T
ad_h
out_h
T
T
upwait
ale_h
T
T
T
ad_z
Symbol
gta
in_s
T
T
T
T
upwait
T
T
T
ale_h
in_s
in_h
ale
gta
clk
T
in_h
T
clk
8 × T c
Min
–1
42
42
34
8
5
Max
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
37