EP2C5F256C8N Altera, EP2C5F256C8N Datasheet - Page 84

• Manufacturer Part Number: EP2C5F256C8N
• Description: IC CYCLONE II FPGA 5K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C5F256C8N

• Number Of Logic Elements/cells: 4608
• Number Of Labs/clbs: 288
• Total Ram Bits: 119808
• Number Of I /o: 158
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• No. Of Logic Blocks: 288
• Family Type: Cyclone II
• No. Of I/o's: 158
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 320MHz
• Operating Temperature Range: 0°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1656

Cyclone II Hot-Socketing Specifications
4–2
Cyclone II Device Handbook, Volume 1
Devices Can Be Driven before Power-Up
You can drive signals into the I/O pins, dedicated input pins, and
dedicated clock pins of Cyclone II devices before or during power-up or
power-down without damaging the device. Cyclone II devices support
any power-up or power-down sequence (V
system level design.
I/O Pins Remain Tri-Stated during Power-Up
A device that does not support hot socketing may interrupt system
operation or cause contention by driving out before or during power-up.
In a hot-socketing situation, the Cyclone II device’s output buffers are
turned off during system power-up or power-down. The Cyclone II
device also does not drive out until the device is configured and has
attained proper operating conditions. The I/O pins are tri-stated until the
device enters user mode with a weak pull-up resistor (R) to 3.3V. Refer to
Figure 4–1
1
■
■
This specification takes into account the pin capacitance but not board
trace and external loading capacitance. You must consider additional
capacitance for trace, connector, and loading separately.
I
specification applies when all V
powered-up or powered-down conditions. For the AC specification, the
peak current duration due to power-up transients is 10 ns or less.
A possible concern for semiconductor devices in general regarding hot
socketing is the potential for latch-up. Latch-up can occur when electrical
subsystems are hot socketed into an active system. During hot socketing,
the signal pins may be connected and driven by the active system before
IOPIN
The hot-socketing DC specification is | I
The hot-socketing AC specification is | I
less.
is the current at any user I/O pin on the device. The DC
You can power up or power down the V
any sequence. The V
to their steady state levels. (Refer to
information.) The power supply ramp rates can range from
100 µs to 100 ms for non “A” devices. Both V
power down within 100 ms of each other to prevent I/O pins
from driving out. During hot socketing, the I/O pin capacitance
is less than 15 pF and the clock pin capacitance is less than 20 pF.
Cyclone II devices meet the following hot-socketing
specification.
for more information.
CCIO
CC
and V
supplies to the device are stable in the
CCINT
CCIO
IOPIN
IOPIN
Figure 4–3
must have monotonic rise
and V
CCIO
| < 300 µA.
| < 8 mA for 10 ns or
and V
CCINT
CC
Altera Corporation
for more
supplies must
February 2007
) to simplify
CCINT
pins in