EP2C35F672C8 Altera, EP2C35F672C8 Datasheet - Page 74
![IC CYCLONE II FPGA 33K 672-FBGA](/photos/6/72/67269/ep2c35f672c8_sml.jpg)
EP2C35F672C8
Manufacturer Part Number
EP2C35F672C8
Description
IC CYCLONE II FPGA 33K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C35F672C8
Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
475
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
33216
# I/os (max)
475
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
33216
Ram Bits
483840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
For Use With
NANO-CYCLONE - KIT NANOBOARD AND CYCLONEII DC807-1002 - DAUGHTER CARD ALTERA CYCLONE IIP0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1089
EP2C35F672C8ES
EP2C35F672C8ES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C35F672C8
Manufacturer:
ALTERA
Quantity:
20 000
Company:
Part Number:
EP2C35F672C8N
Manufacturer:
YAGEO
Quantity:
500 000
Company:
Part Number:
EP2C35F672C8N
Manufacturer:
ALTERA
Quantity:
500
Part Number:
EP2C35F672C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Document Revision History
Document
Revision History
2–62
Cyclone II Device Handbook, Volume 1
February 2007
v3.1
November 2005
v2.1
July 2005 v2.0
February 2005
v1.2
November 2004
v1.1
June 2004 v1.0
Table 2–21. Document Revision History
Document
Version
Date &
●
●
●
●
●
●
●
●
●
●
●
●
●
●
Updated figure 2-12.
Updated
Added document to the Cyclone II Device Handbook.
Added document revision history.
Removed Table 2-1.
Updated
Added new
Added handpara note in
Updated
Updated
Updated
Updated Programmable Drive Strength table.
Updated
Updated
Updated
Updated technical content throughout.
Updated
Table
Table 2–21
Figure
Note (2)
Table
Figures 2–11
Table
Table
Table
Table
2–19.
Note (1)
2–7.
2–16.
2–18.
2–19.
2–16.
2–25.
to
Changes Made
Table
to
shows the revision history for this document.
Table
and 2–12.
“I/O Banks”
2–20.
2–17.
section.
●
●
Removed Drive Strength
Control from
Elaboration of DDR2 and
QDRII interfaces supported
by I/O bank included.
Summary of Changes
Altera Corporation
February 2007
Figure
2–25.