EP1K50FC484-3 Altera, EP1K50FC484-3 Datasheet - Page 52

IC ACEX 1K FPGA 50K 484-FBGA

EP1K50FC484-3

Manufacturer Part Number
EP1K50FC484-3
Description
IC ACEX 1K FPGA 50K 484-FBGA
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K50FC484-3

Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
40960
Number Of I /o
249
Number Of Gates
199000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
484-FBGA
Family Name
ACEX™ 1K
Number Of Usable Gates
50000
Number Of Logic Blocks/elements
2880
# I/os (max)
249
Frequency (max)
166.67MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
2880
Ram Bits
40960
Device System Gates
199000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1071

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ACEX 1K Programmable Logic Device Family Data Sheet
Figure 26. ACEX 1K Device IOE Timing Model
Figure 27. ACEX 1K Device EAB Timing Model
52
Output Register
Input Register
Data Feedback
into FastTrack
Interconnect
Output Enable
Address
Clock Enable
Data-In
Clock
Clock
WE
RE
Data-In
Clock
Clear
EAB Data Input
Write Enable
Input Delays
Read Enable
Input Delays
t
t
EAB Clock
t
t
t
t
t
EABDATA1
EABDATA2
EABWE1
EABWE2
EABCLK
EABRE1
EABRE2
Delays
Delay
Feedback Delay
Contol Delay
Output Data
I/O Element
I/O Register
Input Delay
t
Delay
INCOMB
t
t
t
IOC
IOFD
IOD
Input Register
t
t
t
t
t
t
EABCO
EABBYPASS
EABSU
EABH
EABCH
EABCL
Delays
Input Register Delay
Block Delays
RAM/ROM
t
t
t
t
t
t
t
t
t
t
t
AA
DD
WP
WDSU
WDH
WASU
WAH
WO
RP
RASU
RAH
I/O Register
t
t
t
t
t
Delays
IOCO
IOCOMB
IOSU
IOH
IOCLR
t
INREG
Output Register
t
t
t
t
t
t
EABCO
EABBYPASS
EABSU
EABH
EABCH
EABCL
Delays
Output
Delays
t
t
t
t
t
t
t
OD1
OD2
OD3
XZ
ZX1
ZX2
ZX3
EAB Output
t
EABOUT
Delay
Altera Corporation
Data-Out

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