EP4CE55F29C8LN Altera, EP4CE55F29C8LN Datasheet - Page 253
EP4CE55F29C8LN
Manufacturer Part Number
EP4CE55F29C8LN
Description
IC CYCLONE IV FPGA 55K 780FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE55F29C8LN
Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
374
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 9: SEU Mitigation in Cyclone IV Devices
Software Support
Software Support
© February 2010 Altera Corporation
Enabling the CRC error detection feature in the Quartus II software generates the
CRC_ERROR output to the optional dual purpose CRC_ERROR pin.
To enable the error detection feature using CRC, perform the following steps:
1. Open the Quartus II software and load a project using Cyclone IV devices.
2. On the Assignments menu, click Settings. The Settings dialog box appears.
3. In the Category list, select Device. The Device page appears.
4. Click Device and Pin Options. The Device and Pin Options dialog box appears as
5. In the Device and Pin Options dialog box, click the Error Detection CRC tab.
6. Turn on Enable error detection CRC.
7. In the Divide error check frequency by box, enter a valid divisor as documented
8. Click OK.
Figure 9–2. Enabling the Error Detection CRC Feature in the Quartus II Software
shown in
in
1
Table 9–5 on page
The divisor value divides the frequency of the configuration oscillator
output clock. This output clock is used as the clock source for the error
detection process.
Figure
9–2.
9–5.
Cyclone IV Device Handbook, Volume 1
9–7
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