XC4VFX40-11FFG672C Xilinx Inc, XC4VFX40-11FFG672C Datasheet - Page 345

• Manufacturer Part Number: XC4VFX40-11FFG672C
• Description: IC FPGA VIRTEX-4 FX 40K 672-FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX40-11FFG672C

• Number Of Logic Elements/cells: 41904
• Number Of Labs/clbs: 4656
• Total Ram Bits: 2654208
• Number Of I /o: 352
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
Instantiating IDELAYCTRL with Location (LOC) Constraints
The most efficient way to use the IDELAYCTRL module is to define and lock down the
placement of every IDELAYCTRL instance used in a design. This is done by instantiating
the IDELAYCTRL instances with location (LOC) constraints. The user must define and
lock placement of all ISERDES and IDELAY components using the delay element.
(IOBDELAY_TYPE attribute set to FIXED or VARIABLE). Once completed, IDELAYCTRL
sites can be chosen and LOC constraints assigned. Xilinx strongly recommends using
IDELAYCTRL with a LOC constraint.
Figure 7-17: Instantiate IDELAYCTRL Without LOC Constraints - RDY Connected
The VHDL and Verilog use models for instantiating an IDELAYCTRL primitive
without LOC constraints with the RDY port connected are provided.
VHDL Use Model
-- Only one instance of IDELAYCTRL primitive is instantiated.
-- The RDY port is connected
dlyctrl:IDELAYCTRL
Verilog Use Model
// Only one instance of IDELAYCTRL primitive is instantiated.
// The RDY port is connected
IDELAYCTRL dlyctrl (
The resulting circuitry after instantiating the IDELAYCTRL components is illustrated
in
REFCLK
Figure
RST
7-17.
port map(
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.
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www.xilinx.com
);
.
.
.
RDY => rdy,
REFCLK => refclk,
RST => rst
);
.RDY(rdy),
.REFCLK(refclk),
.RST(rst)
all IDELAYCTRL
Replicated for
Instantiated by user
REFCLK
RST
REFCLK
RST
REFCLK
RST
IDELAYCTRL
IDELAYCTRL
IDELAYCTRL
sites
.
.
.
RDY
RDY
RDY
ILOGIC Resources
Auto-generated by
mapper tool
ug070_7_17_080104
RDY
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