XC4VFX40-11FFG1152C Xilinx Inc, XC4VFX40-11FFG1152C Datasheet - Page 260
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XC4VFX40-11FFG1152C
Manufacturer Part Number
XC4VFX40-11FFG1152C
Description
IC FPGA VIRTEX-4 FX 40K 1152FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VFX40-11FFG1152C
Number Of Logic Elements/cells
41904
Number Of Labs/clbs
4656
Total Ram Bits
2654208
Number Of I /o
448
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 6: SelectIO Resources
260
PCIX, PCI33, PCI66 (Peripheral Component Interface)
Table 6-7
LVDCI_DV2 I/O standards.
Table 6-7: Allowed Attributes of the LVDCI, HSLVDCI, and LVDCI_DV2 I/O
Standards
The PCI standard specifies support for 33 MHz, 66 MHz, and 133 MHz PCI bus
applications. It uses an LVTTL input buffer and a push-pull output buffer. This standard
does not require the use of a reference voltage (V
However, it does require 3.3V input/output source voltage (V
A PCI undershoot/overshoot specification could require V
discussed in
undershoot are controlled by careful design.
Table 6-8
Table 6-8: PCI33_3, PCI66_3, and PCIX DC Voltage Specifications
Table 6-9
and PCIX I/O standards.
Table 6-9: Allowed Attributes of the PCI33_3, PCI66_3, and PCIX I/O Standards
Notes:
1. Tested according to the relevant specification.
CAPACITANCE
IOSTANDARD
V
V
V
V
V
V
V
I
I
IOSTANDARD
CAPACITANCE
OH
OL
CCO
REF
TT
IH
IL
OH
OL
at V
= 0.3 × V
at V
= 0.5 × V
= 0.1 × V
= 0.9 × V
Attributes
Attributes
OL
OH
details the allowed attributes that can be applied to the LVDCI, HSLVDCI, and
lists the DC voltage specifications.
details the allowed attributes that can also be applied to the PCI33_3, PCI66_3,
(mA)
(mA)
“Regulating VCCO at 3.0V,” page
CCO
CCO
Parameter
CCO
CCO
www.xilinx.com
LVDCI_DV2_15, LVDCI_DV2_18, LVDCI_DV2_25, HSLVDCI_15,
IBUF/IBUFG
IBUF/IBUFG
LVDCI_15, LVDCI_18, LVDCI_25, LVDCI_33
HSLVDCI_18, HSLVDCI_25, HSLVDCI_33
LOW, NORMAL, DONT_CARE
LOW, NORMAL, DONT_CARE
(Note 1)
(Note 1)
PCI33_3, PCI66_3, and PCIX
Min
–0.5
3.0
1.5
2.7
–
–
–
306. This is not necessary if overshoot and
REF
OBUF/OBUFT
OBUF/OBUFT
) or a board termination voltage (V
Primitives
Primitives
CCO
UG070 (v2.6) December 1, 2008
CCO
Typ
1.65
0.99
3.3
to be regulated at 3.0V as
–
–
–
–
–
–
Virtex-4 FPGA User Guide
).
IOBUF
IOBUF
V
CCO
Max
1.08
0.36
3.5
–
–
–
–
–
+ 0.5
TT
).
R
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