XC4VFX40-11FFG1152C Xilinx Inc, XC4VFX40-11FFG1152C Datasheet - Page 50
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XC4VFX40-11FFG1152C
Manufacturer Part Number
XC4VFX40-11FFG1152C
Description
IC FPGA VIRTEX-4 FX 40K 1152FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VFX40-11FFG1152C
Number Of Logic Elements/cells
41904
Number Of Labs/clbs
4656
Total Ram Bits
2654208
Number Of I /o
448
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Part Number:
XC4VFX40-11FFG1152C
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Chapter 1: Clock Resources
50
BUFGMUX_VIRTEX4 VHDL and Verilog Templates
Verilog Template
Declaring Constraints in UCF File
VHDL Template
The following examples illustrate the instantiation of the BUFGMUX_VIRTEX4 module in
VHDL and Verilog.
//Example BUFGMUX module declaration
module BUFGMUX (O, I0, I1, S);
endmodule;
//Example BUFGMUX instantiation
BUFGMUX U_BUFGMUX (
.O(user_o),
.I0(user_i0),
.I1(user_i1),
.S0(user_s)
);
// Declaring constraints in Verilog
// synthesis attribute LOC of U_BUFGMUX is "BUFGCTRL_X#Y#";
// where # is valid integer locations of BUFGCTRL
INST "U_BUFGMUX" LOC = BUFGCTRL_X#Y#;
where # is valid integer locations of BUFGCTRL
--Example BUFGMUX_VIRTEX4 declaration
component BUFGMUX_VIRTEX4
port(
end component;
--Example BUFGMUX_VIRTEX4 instantiation
U_BUFGMUX_VIRTEX4 : BUFGMUX_VIRTEX4
Port map (
output O;
input I0;
input I1;
input S;
O : out std_ulogic;
I0 : in
I1 : in
S : in
);
O => user_o,
I0 => user_i0,
I1 => user_i1,
S => user_s
);
std_ulogic;
std_ulogic;
std_ulogic
www.xilinx.com
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
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