20-668-0024 Rabbit Semiconductor, 20-668-0024 Datasheet - Page 131

• Manufacturer Part Number: 20-668-0024
• Description: IC CPU RABBIT4000 128-LQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 20-668-0024

• Processor Type: Rabbit 4000 8-bit
• Speed: 60MHz
• Voltage: 2.5V, 2.7V, 3V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 128-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 20-668-0022; 316-1078

15.1 Overview
The Timer C peripheral is a 16-bit up-counter clocked by the peripheral clock divided by 2,
by the peripheral clock divided by 16, or by the output of countdown timer A1. The
counter counts from zero to the limit programmed into the Timer C divider registers and
then restarts at zero, so the overall cycle count is the value in the divider registers plus one.
There are four Timer C outputs that are called Timers C0–C3. Each output is controlled by
a 16-bit set value and a 16-bit reset value. Each output is set to one when the count
matches the value in the corresponding set register and is cleared when the count matches
the value programmed in the corresponding reset register. This allows the creation of
quadrature signals or three-phase signals with a variable frequency for motor-control
applications. The values in all of the Timer C registers are transferred to holding registers
for use during the count cycle when the counter is reloaded with zeros, allowing the con-
trol registers to be reloaded at any time during the count cycle.
Timer C can generate an interrupt when the count limit value is reached.
A separate Timer C Block Access Register (TCBAR) and Timer C Block Pointer Register
(TCBPR) are available to allow DMA control of Timer C. The pointer register contains
the address of the Timer C register to be accessed via the access register. Each read or
write of the access register automatically increments the pointer register through the
sequence shown below. Note that only the lower five bits of the pointer actually change.
This allows the DMA to write to a fixed internal I/O location but still program all of the
relevant Timer registers. The pointer register can be written and read if necessary. Nor-
mally the pointer register is initialized to 0x02 (the Timer C Divider Low Register), and
the DMA then transfers blocks of 18 bytes to completely reprogram Timer C.
When the DMA destination address is the TCBAR, the DMA request from Timer C is
connected automatically to the DMA.
Chapter 15 Timer C
0x502 -> 0x503 -> 0x508 -> 0x509 -> 0x50A -> 0x50B ->
0x50C -> 0x50D -> 0x50E -> 0x50F -> 0x518 -> 0x519 ->
0x51A -> 0x51B -> 0x51C -> 0x51D -> 0x51E -> 0x51F ->
15. T
IMER
C
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