20-668-0024 Rabbit Semiconductor, 20-668-0024 Datasheet - Page 63
20-668-0024
Manufacturer Part Number
20-668-0024
Description
IC CPU RABBIT4000 128-LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0024.pdf
(358 pages)
Specifications of 20-668-0024
Processor Type
Rabbit 4000 8-bit
Speed
60MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
20-668-0022
316-1078
316-1078
Available stocks
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Part Number
Manufacturer
Quantity
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Part Number:
20-668-0024
Manufacturer:
Rabbit Semiconductor
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5.4 Register Descriptions
Chapter 5 Memory Management
Bit(s)
Bit(s)
7:0
7
6
5
4
3
2
1
0
MMU Instruction/Data Register
Stack Segment Register
Value
Value
Write
Read
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Internal I/O addresses are decoded using only the lower eight bits of the internal
I/O address bus. This restricts internal I/O addresses to the range 0x0000–
0x00FF.
Internal I/O addresses are decoded using all 15 bits of the address internal I/O
address bus. This option must be selected to access internal I/O addresses of
0x0100 and higher.
This bit is reserved an must be written with zero.
Enable A16 and bank select address MSB inversion independent of
instruction/data.
Enable A16 and bank select address MSB inversion for data accesses only. This
enables the instruction/data split.
Normal /CS1 operation.
Force /CS1 always active. This will not cause any conflicts as long as the
memory using /CS1 does not also share an output enable or write enable with
another memory.
Normal operation.
For a data segment access, invert bank select address MSB before MBxCR
decision.
Normal operation.
For a data segment access: invert A16
Normal operation.
For a root segment access, invert bank select address MSB before MBxCR
decision.
Normal operation.
For a root segment access: invert A16
The current contents of this register are reported.
Eight LSBs (MSBs are set to zero by write) of physical address offset to use if
SEGSIZ[7:4] ≤ Addr[15:12] < 0xE
(STKSEG)
(MMIDR)
Description
Description
(Address = 0x0010)
(Address = 0x0011)
53
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