MPC870CVR133 Freescale Semiconductor, MPC870CVR133 Datasheet - Page 69

• Manufacturer Part Number: MPC870CVR133
• Description: IC MPU POWERQUICC 133MHZ 256PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICCr

Specifications of MPC870CVR133

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 133MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 133 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• Data Ram Size: 8 KB
• I/o Voltage: 5 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 8 KB
• Program Memory Type: EPROM/Flash
• Core Size: 32 Bit
• Cpu Speed: 133MHz
• Digital Ic Case Style: BGA
• No. Of Pins: 256
• Supply Voltage Range: 1.7V To 1.9V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 66
15.3
Table 33
Figure 67
15.4
Table 34
correctly with a maximum MDC frequency in excess of 2.5 MHz.
Freescale Semiconductor
Num
Num
M10
M11
M12
M13
M14
M15
M9
MII_CRS, MII_COL minimum pulse width
MII_MDC falling edge to MII_MDIO output invalid (minimum propagation
delay)
MII_MDC falling edge to MII_MDIO output valid (max prop delay)
MII_MDIO (input) to MII_MDC rising edge setup
MII_MDIO (input) to MII_MDC rising edge hold
MII_MDC pulse width high
MII_MDC pulse width low
provides information on the MII async inputs signal timing.
provides information on the MII serial management channel signal timing. The FEC functions
MII_TXD[3:0] (Outputs)
MII Async Inputs Signal Timing (MII_CRS, MII_COL)
MII Serial Management Channel Timing (MII_MDIO, MII_MDC)
shows the MII transmit signal timing diagram.
shows the MII asynchronous inputs signal timing diagram.
MII_TX_CLK (Input)
MII_CRS, MII_COL
MII_TX_EN
MII_TX_ER
MPC875/MPC870 PowerQUICC™ Hardware Specifications, Rev. 4
Table 34. MII Serial Management Channel Timing
Figure 66. MII Transmit Signal Timing Diagram
Characteristic
Figure 67. MII Async Inputs Timing Diagram
Characteristic
Table 33. MII Async Inputs Signal Timing
M5
M6
M7
M9
M8
Min
1.5
40%
40%
Min
10
—
0
0
Max
—
FEC Electrical Characteristics
Max
60%
60%
25
—
—
—
MII_TX_CLK period
MII_MDC period
MII_MDC period
Unit
Unit
ns
ns
ns
ns
69