Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 113
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
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UM008101-0601
Figure 40.
Block Length
All operations must have a declared block length because the default values
at power-up are unpredictable for block length. These registers are written
to by setting pointer bits 5 and 6 in the WR0 base register byte. The block
length can be up to 64 Kbytes. Due to the pipelining method of reading in
data, the number of bytes actually searched or transferred may be one or
two more than the number entered here. “Address and Byte Counting” on
page 75 in “Internal Structure” on page 71 describes this (Table 11).
Programming a block length of zero results in the transfer or search of 216
+ 1 bytes. Therefore, the shortest block length that can be entered is 1,
which usually results in a transfer or search of two bytes (Table 12).
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 0 Group
0 = Port B
0 = Port A
0
0
1
1
0
1
0
1
= Transfer
= Search
= Search/Transfer
→
→
Base Register Byte
Port A starting address (Low Byte)
Port A starting address (High Byte)
Block length (Low Byte)
Block length (High Byte)
Do not use
Port A
Port B
< % 2 7 2 G T K R J G T C N U
Direct Memory Access
7 U G T / C P W C N
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