IDT79RC32K438-300BBG IDT, Integrated Device Technology Inc, IDT79RC32K438-300BBG Datasheet

Page 1

Features ◆ 32-bit CPU Core – MIPS32 instruction set – Cache Sizes: 16KB instruction and data caches, 4-Way set associative, cache line locking, non-blocking prefetches – 16 dual-entry JTLB with variable page sizes – 3-entry instruction TLB – 3-entry data ...

Page 2

IDT 79RC32438 ◆ DMA Controller – 10 DMA channels: two channels for PCI (PCI to Memory and Memory to PCI), two for each Ethernet interface, two channels for memory to memory operations, two channels for external operations – Provides flexible ...

Page 3

IDT 79RC32438 card application the primary PCI controller in the system. The PCI interface can be operated synchronously or asynchronously to the other I/O interfaces on the RC32438 device. Ethernet Interface The RC32438 has two Ethernet Channels supporting ...

Page 4

IDT 79RC32438 Pin Description Table The following table lists the functions of the pins provided on the RC32438. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using a ...

Page 5

IDT 79RC32438 Signal WAITACKN DDR Bus DDRADDR[13:0] DDRBA[1:0] DDRCASN DDRCKE DDRCKN[1:0] DDRCKP[1:0] DDRCSN[1:0] DDRDATA[31:0] DDRDM[7:0] DDRDQS[3:0] DDROEN[3:0] DDRRASN Type Name/Description I Wait or Transfer Acknowledge. When configured as wait, this signal is asserted during a memory and peripheral bus transaction ...

Page 6

IDT 79RC32438 Signal DDRVREF DDRWEN PCI Bus PCIAD[31:0] PCICBEN[3:0] PCICLK PCIDEVSELN PCIFRAMEN PCIGNTN[3:0] PCIIRDYN PCILOCKN PCIPAR PCIPERRN Type Name/Description I DDR Voltage Reference. SSTL_2 DDR voltage reference generated by an external source. O DDR Write Enable. DDR write enable is ...

Page 7

IDT 79RC32438 Signal PCIREQN[3:0] PCIRSTN PCISERRN PCISTOPN PCITRDYN General Purpose Input/Output GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] Type Name/Description I/O PCI Bus Request. In PCI host mode with internal arbiter: These signals are inputs whose assertion indicates to the internal ...

Page 8

IDT 79RC32438 Signal GPIO[6] GPIO[7] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] GPIO[16] GPIO[17] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: U0RTSN Alternate function: UART ...

Page 9

IDT 79RC32438 Signal GPIO[18] GPIO[19] GPIO[20] GPIO[21] GPIO[22] GPIO[23] GPIO[24] GPIO[25] GPIO[26] GPIO[27] GPIO[28] GPIO[29] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: DMAFINN0 Alternate function: External ...

Page 10

IDT 79RC32438 Signal GPIO[30] GPIO[31] SPI Interface SCK SDI SDO Bus Interface SCL SDA Ethernet Interfaces MII0CL MII0CRS MII0RXCLK MII0RXD[3:0] MII0RXDV MII0RXER MII0TXCLK MII0TXD[3:0] MII0TXENP MII0TXER MII1CL Type Name/Description I/O General Purpose I/O. This pin can be ...

Page 11

IDT 79RC32438 Signal MII1CRS MII1RXCLK MII1RXD[3:0] MII1RXDV MII1RXER MII1TXCLK MII1TXD[3:0] MII1TXENP MII1TXER MIIMDC MIIMDIO JTAG / EJTAG EJTAG_TMS JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS Type Name/Description I Ethernet 1 MII Carrier Sense. This signal is asserted by the ethernet PHY when either ...

Page 12

IDT 79RC32438 Signal JTAG_TRST_N Debug CPU INST Pin Characteristics Note: Some input pads of the RC32438 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal ...

Page 13

IDT 79RC32438 Function Pin Name DDR Bus DDRADDR[13:0] DDRBA[1:0] DDRCASN DDRCKE DDRCKN[1:0] DDRCKP[1:0] DDRCSN[1:0] DDRDATA[31:0] DDRDM[7:0] DDRDQS[3:0] DDROEN[3:0] DDRRASN DDRVREF DDRWEN 3 PCI Bus Interface PCIAD[31:0] PCICBEN[3:0] PCICLK PCIDEVSELN PCIFRAMEN PCIGNTN[3:0] PCIIRDYN PCILOCKN PCIPAR PCIPERRN PCIREQN[3:0] PCIRSTN PCISERRN PCISTOPN PCITRDYN ...

Page 14

IDT 79RC32438 Function Pin Name Serial Interface SCK SDI SDO 2 I C-Bus Interface SCL SDA Ethernet Interfaces MII0CL MII0CRS MII0RXCLK MII0RXD[3:0] MII0RXDV MII0RXER MII0TXCLK MII0TXD[3:0] MII0TXENP MII0TXER MII1CL MII1CRS MII1RXCLK MII1RXD[3:0] MII1RXDV MII1RXER MII1TXCLK MII1TXD[3:0] MII1TXENP MII1TXER MIIMDC MIIMDIO ...

Page 15

IDT 79RC32438 Function Miscellaneous 1. External pull-up required in most system applications. Some applications may require additional pull-ups not identified in this table. 2. Schmidt Trigger Input (STI). 3. The PCI pins have internal pull-ups but they are too weak ...

Page 16

IDT 79RC32438 Signal MDATA[7] MDATA[8] MDATA[11:9] MDATA[12] MDATA[15:13] Name/Description Boot Device Width. This field specifies the width of the boot device (i.e., Device 0). 0x0 - 8-bit boot device width 0x1 - 16-bit boot device width Reset Mode. This bit ...

Page 17

IDT 79RC32438 Logic Diagram — RC32438 Miscellaneous Signals Ethernet EJTAG / JTAG Signals Debug Signals General Purpose I C-Bus Serial I/O CLK COLDRSTN RSTN EXTCLK MIIMDC MIIMDIO MII0CL MII0CRS MII0RXCLK 4 MII0RXD[3:0] MII0RXDV MII0RXER MII0TXCLK 4 MII0TXD[3:0] MII0TXENP ...

Page 18

IDT 79RC32438 AC Timing Definitions Below are examples of the AC timing characteristics used throughout this document. clock Output signal 1 Output signal 2 Input Signal 1 Signal 1 Signal 2 Signal 3 Symbol Tper Clock period. Tlow Clock low. ...

Page 19

IDT 79RC32438 System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 15 and 16. Parameter Symbol 1 PCLK Frequency Tper 2,3,4 ICLK Frequency Tper 5 CLK Frequency Tper_5a Thigh_5a, Tlow_5a ...

Page 20

IDT 79RC32438 AC Timing Characteristics Values given below are based on systems running at recommended operating temperatures and supply voltages, shown in Tables 15 and 16. Reference Signal Symbol Edge Reset 1 2 COLDRSTN Tpw_6a none Trise_6a none 3 2 ...

Page 21

IDT 79RC32438 CLK COLDRSTN RSTN MDATA[15:0] Mem Control Signals EXTCLK 1. Warm reset caused by any of the conditions listed in the Warm Reset section of Chapter 3, Clocking and Initialization, in the RC32438 User Reference Manual. 2. The RC32438 ...

Page 22

IDT 79RC32438 DDRCKPx DDRCKNx DDRCSNx DDRADDR[13:0] 1 NOP DDRCMD DDRCKE DDRBA[1:0] DDRDM[7:0] DDROEN[3:0] DDRDQSx (ideal) 2 DDRDATA[31:0] (ideal) DDRDQSx (min) 2 DDRDATA[31:0] DDRDQSx (max) 2 DDRDATA[31:0] 1 DDRCMD contains DDRRASN, DDRCASN and DDRWEN. 2 DDRDATA is either 32-bits or 16-bits ...

Page 23

IDT 79RC32438 DDRCKPx DDRCKNx DDRCSNx DDRADDR[13:0] 1 NOP DDRCMD DDRCKE DDRBA[1:0] DDROEN[3:0] DDRDQSx DDRDM[7:0] DDRDQSx 2 DDRDATA[31:0] 1 DDRCMD contains DDRRASN, DDRCASN and DDRWEN. 2 DDRDATA is either 32-bits or 16-bits wide depending on the DBW control bit in DDRC ...

Page 24

IDT 79RC32438 Reference Signal Symbol Edge MDATA[15:0] Tsu_8c EXTCLK rising Thld_8c Tdo_8c 2 Tdz_8c 2 Tzd_8c 3 EXTCLK Tper_8d none BDIRN Tdo_8e EXTCLK rising 2 Tdz_8e 2 Tzd_8e BOEN Tdo_8f EXTCLK rising 2 Tdz_8f 2 Tzd_8f BRN Tsu_8g EXTCLK rising ...

Page 25

IDT 79RC32438 Reference Signal Symbol Edge 2 DMAREQN[1:0] Tpw_8n None DMADONEN[1:0] Tsu_8o EXTCLK rising Thld_8o DMAFINN[1:0] Tdo_8p EXTCLK rising CPU, INST Tdo_8m EXTCLK rising Table 8 Memory and Peripheral Bus AC Timing Characteristics (Part The RC32438 ...

Page 26

IDT 79RC32438 EXTCLK MADDR[21:0] MADDR[25:22] RWN CSN[5:0] 1111 BWEN[1:0] OEN MDATA[15:0] BDIRN BOEN WAITACKN CPU, INST Figure 9 Memory and Peripheral Bus AC Timing Waveform — Write Access EXTCLK DMADONENx MDATA[15:0] MADDR[25:0] DMAFINNx Tdo_8a Addr[21:0] Tdo_8b Addr[25:22] Tdo_8j Tdo_8i Tdo_8l ...

Page 27

IDT 79RC32438 EXTCLK DMAREQN ICLK CSN Tpw_8n is the minimum amount of time before DMAREQN is recognized as asserted or deasserted. Reference Signal Symbol Edge 1 Ethernet MIIMDC Tper_9a None Thigh_9a, Tlow_9a MIIMDIO Tsu_9b MIIMDC rising Thld_9b 2 Tdo_9b MIIxRXCLK, ...

Page 28

IDT 79RC32438 3. The ethernet clock (MIIxRXCLK and MIIxTXCLK) frequency must be equal to or less than 1/2 ICLK (MIIxRXCLK and MIIxTXCLK <= 1/2(ICLK)). MIIxRXDV, MIIxRXD[3:0], MIIxRXER MIIxTXEN, MIIxTXD[3:0], MIIxTXER Tper_9d MIIxRXCLK Thld_9e Tsu_9e Tper_9d MIIxTXCLK Tdo_9f Tper_9a MIIxMDC Tdo_9b ...

Page 29

IDT 79RC32438 Reference Signal Symbol Edge 1 PCI 2 PCICLK Tper_10a none Thigh_10a, Tlow_10a Tslew_10a PCIAD[31:0], Tsu_10b PCICLK rising PCIBEN[3:0], Thld_10b PCIDEVSELN, PCIFRAMEN,PCIIR- Tdo_10b DYN, PCILOCKN, 3 Tdz_10b PCIPAR, PCI- PERRN, PCIS- 3 Tzd_10b TOPN, PCITRDY PCIGNTN[3:0], Tsu_10c PCICLK rising ...

Page 30

IDT 79RC32438 PCICLK Bussed output Point to point output Bussed input Point to point input COLDRSTN PCIRSTN (output) RSTN Note: During and after cold reset, PCIRSTN is tri-stated and requires a pull-down to reach a low state. After the PCI ...

Page 31

IDT 79RC32438 Reference Signal Symbol SCL Frequency none Thigh_12a, Tlow_12a Trise_12a Tfall_12a SDA Tsu_12b SCL rising Thld_12b Trise_12b Tfall_12b Start or repeated start Tsu_12c SDA falling condition Thld_12c Stop condition Tsu_12d SDA rising Bus free time ...

Page 32

IDT 79RC32438 SDA Thld_12c SCL Reference Signal Symbol Edge GPIO 1 2 GPIO[31:0] Tpw_13b None 1. GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if they are asynchronous. 2. The ...

Page 33

IDT 79RC32438 Reference Signal Symbol Edge 1 SPI SCK Tper_15a None Tper_15a Tper_15a Thigh_15a, Tlow_15a Thigh_15a, Tlow_15a Thigh_15a, Tlow_15a SDI Tsu_15b SCK rising or falling Thld_15b SDO Tdo_15c SCK rising or falling 2 PCIEECS Tdo_15d SCK rising or falling 3 ...

Page 34

IDT 79RC32438 Tper_15a SCK SDI MSB SDO MSB Control bits CPOL = 0, CPHA = 0 in the SPI Control Register, SPC. Figure 19 SPI AC Timing Waveform — Clock Polarity 0, Clock Phase 0 Tper_15a SCK SDI SDO Control ...

Page 35

IDT 79RC32438 Reference Signal Symbol Edge EJTAG and JTAG JTAG_TCK Tper_16a none Thigh_16a, Tlow_16a 1 JTAG_TMS , Tsu_16b JTAG_TCK JTAG_TDI rising Thld_16b JTAG_TDO Tdo_16c JTAG_TCK falling 2 Tdz_16c 2 JTAG_TRST_N Tpw_16d none 1 EJTAG_TMS Tsu_16e JTAG_TCK rising Thld_6e VSENSE Trise_16f ...

Page 36

IDT 79RC32438 JTAG_TCK JTAG_TDI JTAG_TMS EJTAG_TMS JTAG_TDO JTAG_TRST_N The IEEE 1149.1 specification requires that the JTAG and EJTAG TAP controllers be reset at power-up whether or not the interfaces are used for a boundary scan or a probe. Reset can ...

Page 37

IDT 79RC32438 Using the EJTAG Probe In Figure 23, the pull-up resistors for JTAG_TDO and RST*, the pull-down resistor for JTAG_TRST_N, and the series resistor for JTAG_TDO must be adjusted to the specific design. However, the recommended pull-up/down resistor is ...

Page 38

IDT 79RC32438 Recommended Operating Supply Voltages Symbol Parameter V Common ground ss V PLL PLL ground ss V I/O I/O supply except for SSTL_2 cc V SI/O I/O supply for SSTL_2 cc V PLL PLL supply cc V Core Internal ...

Page 39

IDT 79RC32438 Power-on Sequence Three power-on sequences are given below. Sequence #1 is recommended because it will prevent I/O conflicts and will also allow the input signals to propagate when the I/O powers are brought up. Note: The ESD diodes ...

Page 40

IDT 79RC32438 Power Consumption Parameter 200MHz Typ. I I/O 130 cc I SI/O 100 cc I Core, Normal 460 cc I PLL mode cc Power Normal 1.2 Dissipation mode DC Electrical Characteristics Values based on systems running at recommended supply ...

Page 41

IDT 79RC32438 Para- I/O Type meter PCI I (AC) OH Switching I (AC) Switch- OL ing Capacitance C IN Inputs Leakage I/O / LEAK W O Pull-ups/downs with I/O LEAK Pull-ups/downs AC Test Conditions RC32438 Output ...

Page 42

IDT 79RC32438 Absolute Maximum Ratings Symbol Core CC V PLL CC VinI/O VinSI Industrial T a Commercial Functional and tested operating conditions are given in Table 15. Absolute ...

Page 43

IDT 79RC32438 Package Pin-out — 416-PBGA Signal Pinout for RC32438 The following table lists the pin numbers, signal names, and number of alternate functions for the RC32438 device. Signal names ending with an “_N” or “N” are active when low. ...

Page 44

IDT 79RC32438 Pin Function Alt Pin B9 MDATA[11] G3 B10 MDATA[03] G4 B11 MDATA[08] G23 B12 MDATA[02] G24 B13 GPIO[23] 1 G25 B14 MADDR[20] G26 B15 GPIO[20 B16 MADDR[17] H2 B17 MADDR[14] H3 B18 MADDR[12] H4 B19 MADDR[09] ...

Page 45

IDT 79RC32438 Pin Function Alt Pin C20 MADDR[08] L26 C21 MADDR[04] M1 C22 MADDR[01] M2 C23 DDRDATA[00] M3 C24 DDRDATA[03] M4 C25 DDRDATA[08] M23 C26 DDRDATA[07] M24 D1 MII0RXD[03] M25 D2 MII0RXD[01] M26 D3 MII0RXD[02 ...

Page 46

IDT 79RC32438 RC32438 Ground Pins D10 D11 D12 D16 D17 D18 D19 G23 H4 H23 J4 J23 K10 K11 K12 K13 K14 K15 K16 K17 K23 L10 P13 ...

Page 47

IDT 79RC32438 RC32438 Alternate Signal Functions Pin GPIO Alternate A14 GPIO[22] MADDR[24] B13 GPIO[23] MADDR[25] B15 GPIO[20] MADDR[22] C16 GPIO[21] MADDR[23] N3 GPIO[01] U0SINP P1 GPIO[00] U0SOUT P3 GPIO[02] U0RIN T2 GPIO[03] U0DCDN V3 GPIO[05] U0DSRN W1 GPIO[04] U0DTRN RC32438 ...

Page 48

IDT 79RC32438 Signal Name DDRADDR[00] DDRADDR[01] DDRADDR[02] DDRADDR[03] DDRADDR[04] DDRADDR[05] DDRADDR[06] DDRADDR[07] DDRADDR[08] DDRADDR[09] DDRADDR[10] DDRADDR[11] DDRADDR[12] DDRADDR[13] DDRBA[00] DDRBA[01] DDRCASN DDRCKE DDRCKN[00] DDRCKN[01] DDRCKP[00] DDRCKP[01] DDRCSN[00] DDRCSN[01] DDRDATA[00] DDRDATA[01] DDRDATA[02] DDRDATA[03] DDRDATA[04] DDRDATA[05] DDRDATA[06] DDRDATA[07] DDRDATA[08] DDRDATA[09] DDRDATA[10] I/O ...

Page 49

IDT 79RC32438 Signal Name DDRDATA[11] DDRDATA[12] DDRDATA[13] DDRDATA[14] DDRDATA[15] DDRDATA[16] DDRDATA[17] DDRDATA[18] DDRDATA[19] DDRDATA[20] DDRDATA[21] DDRDATA[22] DDRDATA[23] DDRDATA[24] DDRDATA[25] DDRDATA[26] DDRDATA[27] DDRDATA[28] DDRDATA[29] DDRDATA[30] DDRDATA[31] DDRDM[00] DDRDM[01] DDRDM[02] DDRDM[03] DDRDM[04] DDRDM[05] DDRDM[06] DDRDM[07] DDRDQS[00] DDRDQS[01] DDRDQS[02] DDRDQS[03] DDROEN[00] DDROEN[01] I/O ...

Page 50

IDT 79RC32438 Signal Name DDROEN[02] DDROEN[03] DDRRASN DDRVREF DDRWEN EJTAG_TMS EXTCLK GPIO[00] GPIO[01] GPIO[02] GPIO[03] GPIO[04] GPIO[05] GPIO[06] GPIO[07] GPIO[08] GPIO[09] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[14] GPIO[15] GPIO[16] GPIO[17] GPIO[18] GPIO[19] GPIO[20] GPIO[21] GPIO[22] GPIO[23] GPIO[24] GPIO[25] GPIO[26] GPIO[27] I/O ...

Page 51

IDT 79RC32438 Signal Name GPIO[28] GPIO[29] GPIO[30] GPIO[31] INST JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MADDR[00] MADDR[01] MADDR[02] MADDR[03] MADDR[04] MADDR[05] MADDR[06] MADDR[07] MADDR[08] MADDR[09] MADDR[10] MADDR[11] MADDR[12] MADDR[13] MADDR[14] MADDR[15] MADDR[16] MADDR[17] MADDR[18] MADDR[19] MADDR[20] MADDR[21] MDATA[00] MDATA[01] I/O Type ...

Page 52

IDT 79RC32438 Signal Name MDATA[02] MDATA[03] MDATA[04] MDATA[05] MDATA[06] MDATA[07] MDATA[08] MDATA[09] MDATA[10] MDATA[11] MDATA[12] MDATA[13] MDATA[14] MDATA[15] MII0CL MII0CRS MII0RXCLK MII0RXD[00] MII0RXD[01] MII0RXD[02] MII0RXD[03] MII0RXDV MII0RXER MII0TXCLK MII0TXD[00] MII0TXD[01] MII0TXD[02] MII0TXD[03] MII0TXENP MII0TXER MII1CL MII1CRS MII1RXCLK MII1RXD[00] MII1RXD[01] I/O ...

Page 53

IDT 79RC32438 Signal Name MII1RXD[02] MII1RXD[03] MII1RXDV MII1RXER MII1TXCLK MII1TXD[00] MII1TXD[01] MII1TXD[02] MII1TXD[03] MII1TXENP MII1TXER MIIMDC MIIMDIO OEN PCIAD[00] PCIAD[01] PCIAD[02] PCIAD[03] PCIAD[04] PCIAD[05] PCIAD[06] PCIAD[07] PCIAD[08] PCIAD[09] PCIAD[10] PCIAD[11] PCIAD[12] PCIAD[13] PCIAD[14] PCIAD[15] PCIAD[16] PCIAD[17] PCIAD[18] PCIAD[19] PCIAD[20] I/O ...

Page 54

IDT 79RC32438 Signal Name PCIAD[21] PCIAD[22] PCIAD[23] PCIAD[24] PCIAD[25] PCIAD[26] PCIAD[27] PCIAD[28] PCIAD[29] PCIAD[30] PCIAD[31] PCICBEN[00] PCICBEN[01] PCICBEN[02] PCICBEN[03] PCICLK PCIDEVSELN PCIFRAMEN PCIGNTN[00] PCIGNTN[01] PCIGNTN[02] PCIGNTN[03] PCIIRDYN PCILOCKN PCIPAR PCIPERRN PCIREQN[00] PCIREQN[01] PCIREQN[02] PCIREQN[03] PCIRSTN PCISERRN PCISTOPN PCITRDYN RSTN RWN ...

Page 55

IDT 79RC32438 Signal Name SCK SCL SDA SDI SDO Vcc CORE Vcc I/O, Vcc SI/O Vcc PLL Vss Vss PLL WAITACKN I/O Type Location I/O W2 I/O AF4 I/O AD4 I/O V2 I/O V1 D13, D14, D15, K4, L4, L23, ...

Page 56

IDT 79RC32438 RC32438 Pinout — Top View VccPLL AA VssPLL VccPLL AB AC VssPLL AD ...

Page 57

IDT 79RC32438 RC32438 Package Drawing — 416-pin BGA May 25, 2004 ...

Page 58

IDT 79RC32438 RC32438 Package Drawing — Page Two May 25, 2004 ...

Page 59

IDT 79RC32438 Ordering Information YY XXXX 79RCXX Product Operating Device Type Type Voltage Valid Combinations 79RC32K438 -200BB, 233BB, 266BB, 300BB 79RC32K438 -200BBI, 233BBI CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 999 A Temp range/ Package Speed ...