CS42L55-DNZ Cirrus Logic Inc, CS42L55-DNZ Datasheet - Page 22

• Manufacturer Part Number: CS42L55-DNZ
• Description: IC CODEC STER H-HDPN AMP 36-QFN
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS42L55-DNZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 95 / 99
• Voltage - Supply, Analog: 1.65 V ~ 2.71 V
• Voltage - Supply, Digital: 1.65 V ~ 2.71 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1506 - BOARD EVAL FOR CS42L55 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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4. APPLICATIONS
4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.1.6
Overview
Basic Architecture
The CS42L55 is a highly integrated, ultra-low power, 24-bit audio CODEC comprised of stereo A/D and
D/A converters with pseudo-differential stereo input and output amplifiers. The ADC and DAC are de-
signed using multi-bit delta-sigma techniques; both converters operate at a low oversampling ratio of
64xFs, maximizing power savings while maintaining high performance. The CODEC operates in one of
three sample rate speed modes: Quarter, Half and Single. It accepts and is capable of generating serial
audio clocks (SCLK, LRCK) derived from a 12 or 6 MHz input Master Clock (MCLK). Designed with a very
low voltage digital core and low voltage Class H amplifiers (powered from an integrated low-dropout reg-
ulator and a step-down/inverting charge pump, respectively), the CS42L55 provides significant reduction
in overall power consumption.
Line Inputs
The analog input portion of the CODEC allows selection from two stereo line-level sources into a Pro-
grammable Gain Amplifier (PGA). The optional pseudo-differential configuration provides noise-rejection
for single-ended inputs.
Line and Headphone Outputs (Class H, Ground-Centered Amplifiers)
The analog output portion of the CODEC includes separate pseudo-differential headphone and line out
Class H amplifiers. An on-chip step-down/inverting charge pump creates a positive and negative voltage
equal to the input or one-half the input supply for the amplifiers, allowing an adaptable, full-scale output
swing centered around ground. The inverting architecture eliminates the need for large DC-blocking ca-
pacitors and allows the amplifier to deliver more power to headphone loads at lower supply voltages. The
step-down architecture allows the amplifier’s power supply to adapt to the required output signal. This
adaptive power supply scheme converts traditional Class AB amplifiers into more power-efficient Class H
amplifiers.
Fixed-Function DSP Engine
The fixed function digital signal processing engine processes both the PCM serial input data and ADC
output data allowing a mix between the two. Independent volume control, left/right channel swaps, mono
mixes, tone control comprise the DSP engine.
Beep Generator
The beep generator delivers tones at select frequencies across approximately two octave major scales.
With independent volume control, beeps may be configured to occur continuously, periodically or at single
time intervals.
Power Management
Several control registers and bits provide independent power down control of the ADC, PGA, DSP, head-
phone and line outputs, allowing operation in select applications with minimal power consumption.
CS42L55
DS773F1