CS42416-DQZR Cirrus Logic Inc, CS42416-DQZR Datasheet - Page 31

• Manufacturer Part Number: CS42416-DQZR
• Description: IC CODEC 6CH 110DB 192KHZ 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42416-DQZR

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 110
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 6
• Conversion Rate: 192 KSPs
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 2 ADC, 6 DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS602F1
4.5.4
Functional Mode Register (addr = 03h)
Interface Format Register (addr = 04h)
Misc. Control Register (addr = 05h)
Set DAC_FMx = ADC_FMx = 00,01,10
Set ADC_CLK_SEL = 0
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01,10
Set DAC_OLx bits = 00,01,10
Set DAC_SP M/S = 1
Set ADC_SP M/S = 1
Set EXT ADC SCLK = 0
ADC Mode
4.5.4.1
One-Line Mode Configuration #1 can support up to 6 channels of DAC data, and 6 channels of ADC data.
This is the only configuration which will support up to 24-bit samples at a sampling frequency of 48 kHz on
all channels for both the DAC and ADC.
Register / Bit Settings
One-Line Mode (OLM) Configurations
Line Mode
Not One-
One-Line
One-Line
Mode #1
Mode #2
OLM Config #1
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM/QSM
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
CS5361
CS5361
SDOUT1
SDOUT2
SCLK
LRCK
MCLK
Not One-Line Mode
Figure 17. OLM Configuration #1
DAC_LRCK must equal ADC_LRCK; sample rate conversion not supported
RMCK
ADCIN1
ADCIN2
CS42416
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
Configure ADC_SDOUT to be clocked from the DAC_SP clocks.
Select the digital interface format when not in One-Line Mode
ADC_SDOUT
DAC_SDIN1
DAC_SDIN2
DAC_SDIN3
ADC_LRCK
ADC_SCLK
DAC_LRCK
DAC_SCLK
Identify external ADC clock source as SAI Serial Port.
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
DAC_SCLK=128Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
Configure DAC Serial Port to Master Mode.
Configure ADC Serial Port to Master Mode.
One-Line Mode #1
64Fs
64Fs,128Fs, 256Fs
ADC Data
DAC Mode
not valid
Description
MCLK
SCLK_PORT1
LRCK_PORT1
SDIN_PORT1
SCLK_PORT2
LRCK_PORT2
SDOUT1_PORT2
SDOUT2_PORT2
SDOUT3_PORT2
DIGITAL AUDIO
PROCESSOR
DAC_SCLK=256Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=DAC_LRCK
One-Line Mode #2
not valid
not valid
CS42416
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